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Thanks again for your work,
and I would greatly appreciate any insights you could share.

Best regards,
YoungJun Park

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Subject: Re: [PATCH v3] arm64: Restrict pagetable teardown to avoid false
warning
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To: Dev Jain <dev.jain@xxxxxxx>, catalin.marinas@xxxxxxx, will@xxxxxxxxxx
Cc: david@xxxxxxxxxx, anshuman.khandual@xxxxxxx, mark.rutland@xxxxxxx,
yang@xxxxxxxxxxxxxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx,
linux-arm-kernel@xxxxxxxxxxxxxxxxxxx, stable@xxxxxxxxxxxxxxx
References: <20250527082633.61073-1-dev.jain@xxxxxxx>
<914071fe-c133-4c9d-bb2d-9b9fca8a1798@xxxxxxx>
From: Ryan Roberts <ryan.roberts@xxxxxxx>
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On 30/05/2025 04:55, Dev Jain wrote:
>
> On 27/05/25 1:56 pm, Dev Jain wrote:
>> Commit 9c006972c3fe removes the pxd_present() checks because the caller

nit: "Commit 9c006972c3fe" should have actually been:

Commit 9c006972c3fe ("arm64: mmu: drop pXd_present() checks from
pXd_free_pYd_table()")

>> checks pxd_present(). But, in case of vmap_try_huge_pud(), the caller only
>> checks pud_present(); pud_free_pmd_page() recurses on each pmd through
>> pmd_free_pte_page(), wherein the pmd may be none. Thus it is possible to
>> hit a warning in the latter, since pmd_none => !pmd_table(). Thus, add
>> a pmd_present() check in pud_free_pmd_page().
>>
>> This problem was found by code inspection.
>>
>> Fixes: 9c006972c3fe (arm64: mmu: drop pXd_present() checks from
>> pXd_free_pYd_table())
>
> I missed double quotes around the fixes commit message. Can Will or Catalin fix
> that,
> or shall I resend.

For future, I have the following in my ~/.gitconfig

"""
[pretty]
fixes = Fixes: %h (\"%s\")
commit = Commit %h (\"%s\")
"""

Then I can do:

$ git show --pretty=fixes <SHA> | head -n 1

or

$ git show --pretty=commit <SHA> | head -n 1

to get the correct format. Note that "Fixes:" is a tag and should all be on a
single line. "Commit" is just a way to refer to other commits in prose and can
be broken across lines at the usual character limit.

Perhaps there is an even easier way to do it, but this works for me.

Thanks,
Ryan

>
>> Cc: <stable@xxxxxxxxxxxxxxx>
>> Reported-by: Ryan Roberts <ryan.roberts@xxxxxxx>
>> Acked-by: David Hildenbrand <david@xxxxxxxxxx>
>> Signed-off-by: Dev Jain <dev.jain@xxxxxxx>
>> ---
>> This patch is based on 6.15-rc6.
>>
>> v2->v3:
>> Â - Use pmdp_get()
>>
>> v1->v2:
>> Â - Enforce check in caller
>>
>> Â arch/arm64/mm/mmu.c | 3 ++-
>> Â 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
>> index ea6695d53fb9..5a9bf291c649 100644
>> --- a/arch/arm64/mm/mmu.c
>> +++ b/arch/arm64/mm/mmu.c
>> @@ -1286,7 +1286,8 @@ int pud_free_pmd_page(pud_t *pudp, unsigned long addr)
>> Â Â Â Â Â next = addr;
>> Â Â Â Â Â end = addr + PUD_SIZE;
>> Â Â Â Â Â do {
>> -Â Â Â Â Â Â Â pmd_free_pte_page(pmdp, next);
>> +Â Â Â Â Â Â Â if (pmd_present(pmdp_get(pmdp)))
>> +Â Â Â Â Â Â Â Â Â Â Â pmd_free_pte_page(pmdp, next);
>> Â Â Â Â Â } while (pmdp++, next += PMD_SIZE, next != end);
>> Â Â Â Â Â Â pud_clear(pudp);

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On Thu, May 29, 2025 at 10:56:27AM +0200, Vlastimil Babka wrote:
> The slab allocator observes the task's numa policy in various places
> such as allocating slab pages. Large kmalloc allocations currently do
> not, which seems to be an unintended omission. It is simple to correct
> that, so make ___kmalloc_large_node() behave the same way as
> alloc_slab_page().
>
> Signed-off-by: Vlastimil Babka <vbabka@xxxxxxx>
> ---

Reviewed-by: Harry Yoo <harry.yoo@xxxxxxxxxx>

--
Cheers,
Harry / Hyeonggon

> mm/slub.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/mm/slub.c b/mm/slub.c
> index d7a62063a1676a327e13536bf724f0160f1fc8dc..d87015fad2df65629050d9bcd224facd3d2f4033 100644
> --- a/mm/slub.c
> +++ b/mm/slub.c
> @@ -4281,11 +4281,13 @@ static void *___kmalloc_large_node(size_t size, gfp_t flags, int node)
> if (unlikely(flags & GFP_SLAB_BUG_MASK))
> flags = kmalloc_fix_flags(flags);
>
> + flags |= __GFP_COMP;
> +
> if (node == NUMA_NO_NODE)
> - node = numa_mem_id();
> + folio = (struct folio *)alloc_frozen_pages_noprof(flags, order);
> + else
> + folio = (struct folio *)__alloc_frozen_pages_noprof(flags, order, node, NULL);
>
> - flags |= __GFP_COMP;
> - folio = (struct folio *)__alloc_frozen_pages_noprof(flags, order, node, NULL);
> if (folio) {
> ptr = folio_address(folio);
> lruvec_stat_mod_folio(folio, NR_SLAB_UNRECLAIMABLE_B,
>
> --
> 2.49.0
>

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On 30.05.25 03:49, Alistair Popple wrote:
> I'm particularly familiar with mm/migrate.c and especially
> mm/migrate_device.c so add myself to MAINTAINERS.
>
> Signed-off-by: Alistair Popple <apopple@xxxxxxxxxx>
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index b8f1125f68da..219f887f810e 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -15713,6 +15713,7 @@ R: Rakie Kim <rakie.kim@xxxxxx>
> R: Byungchul Park <byungchul@xxxxxx>
> R: Gregory Price <gourry@xxxxxxxxxx>
> R: Ying Huang <ying.huang@xxxxxxxxxxxxxxxxx>
> +R: Alistair Popple <apopple@xxxxxxxxxx>

Yes!

Acked-by: David Hildenbrand <david@xxxxxxxxxx>

--
Cheers,

David / dhildenb

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To: Lorenzo Stoakes <lorenzo.stoakes@xxxxxxxxxx>,
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Cc: Alexander Viro <viro@xxxxxxxxxxxxxxxxxx>,
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On 5/29/25 19:15, Lorenzo Stoakes wrote:
> If a user wishes to enable KSM mergeability for an entire process and all
> fork/exec'd processes that come after it, they use the prctl()
> PR_SET_MEMORY_MERGE operation.
>
> This defaults all newly mapped VMAs to have the VM_MERGEABLE VMA flag set
> (in order to indicate they are KSM mergeable), as well as setting this flag
> for all existing VMAs and propagating this across fork/exec.
>
> However it also breaks VMA merging for new VMAs, both in the process and
> all forked (and fork/exec'd) child processes.
>
> This is because when a new mapping is proposed, the flags specified will
> never have VM_MERGEABLE set. However all adjacent VMAs will already have
> VM_MERGEABLE set, rendering VMAs unmergeable by default.
>
> To work around this, we try to set the VM_MERGEABLE flag prior to
> attempting a merge. In the case of brk() this can always be done.
>
> However on mmap() things are more complicated - while KSM is not supported
> for MAP_SHARED file-backed mappings, it is supported for MAP_PRIVATE
> file-backed mappings.
>
> These mappings may have deprecated .mmap() callbacks specified which could,
> in theory, adjust flags and thus KSM eligibility.
>
> So we check to determine whether this is possible. If not, we set
> VM_MERGEABLE prior to the merge attempt on mmap(), otherwise we retain the
> previous behaviour.
>
> This fixes VMA merging for all new anonymous mappings, which covers the
> majority of real-world cases, so we should see a significant improvement in
> VMA mergeability.
>
> For MAP_PRIVATE file-backed mappings, those which implement the
> .mmap_prepare() hook and shmem are both known to be safe, so we allow
> these, disallowing all other cases.
>
> Also add stubs for newly introduced function invocations to VMA userland
> testing.
>
> Signed-off-by: Lorenzo Stoakes <lorenzo.stoakes@xxxxxxxxxx>
> Fixes: d7597f59d1d3 ("mm: add new api to enable ksm per process") # please no backport!
> Reviewed-by: Chengming Zhou <chengming.zhou@xxxxxxxxx>
> Acked-by: David Hildenbrand <david@xxxxxxxxxx>
> Reviewed-by: Liam R. Howlett <Liam.Howlett@xxxxxxxxxx>

The commit log is much clearer to me now, thanks :)

Reviewed-by: Vlastimil Babka <vbabka@xxxxxxx>

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<20250529143544.2381031-5-dario.binacchi@xxxxxxxxxxxxxxxxxxxx> <aDiDUm6cvrC2q/SP@lizhi-Precision-Tower-5810>
In-Reply-To: <aDiDUm6cvrC2q/SP@lizhi-Precision-Tower-5810>
From: Dario Binacchi <dario.binacchi@xxxxxxxxxxxxxxxxxxxx>
Date: Fri, 30 May 2025 09:16:01 +0200
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Subject: Re: [PATCH v4 4/6] ARM: dts: mxs: support i.MX28 Amarula rmm board
To: Frank Li <Frank.li@xxxxxxx>
Cc: linux-kernel@xxxxxxxxxxxxxxx, linux-amarula@xxxxxxxxxxxxxxxxxxxx,
michael@xxxxxxxxxxxxxxxxxxxx, Conor Dooley <conor+dt@xxxxxxxxxx>,
Fabio Estevam <festevam@xxxxxxxxx>, Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>,
Pengutronix Kernel Team <kernel@xxxxxxxxxxxxxx>, Rob Herring <robh@xxxxxxxxxx>,
Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>, Shawn Guo <shawnguo@xxxxxxxxxx>, devicetree@xxxxxxxxxxxxxxx,
imx@xxxxxxxxxxxxxxx, linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
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Hi Frank,

On Thu, May 29, 2025 at 5:55=E2=80=AFPM Frank Li <Frank.li@xxxxxxx> wrote:
>
> On Thu, May 29, 2025 at 04:35:11PM +0200, Dario Binacchi wrote:
> > The board includes the following resources:
> > - 256 Mbytes NAND Flash
> > - 128 Mbytes DRAM DDR2
> > - CAN
> > - USB 2.0 high-speed/full-speed
> > - Ethernet MAC
> >
> > Signed-off-by: Dario Binacchi <dario.binacchi@xxxxxxxxxxxxxxxxxxxx>
> >
> > ---
> >
> > Changes in v4:
> > - Drop label property (deprecated) under the leds sub-nodes.
> > - Add microSD comment above the ssp0 node.
> >
> > Changes in v3:
> > - Drop xceiver-supply property from can0 node.
> > - Rearrange the order of specific nodes and properties
> > alphabetically.
> >
> > Changes in v2:
> > - Replace '-' with '@' for the pinctrl sub-nodes.
> > - Replace edt,edt-ft5x06 with edt,edt-ft5306.
> > - Drop LCD reset hog pin.
> > - Add correct #address-cells and #size-cells to gpmi node.
> > - Replace edt-ft5x06@38 with touchscreen@38.
> >
> > arch/arm/boot/dts/nxp/mxs/Makefile | 1 +
> > .../boot/dts/nxp/mxs/imx28-amarula-rmm.dts | 301 ++++++++++++++++++
> > 2 files changed, 302 insertions(+)
> > create mode 100644 arch/arm/boot/dts/nxp/mxs/imx28-amarula-rmm.dts
> >
> > diff --git a/arch/arm/boot/dts/nxp/mxs/Makefile b/arch/arm/boot/dts/nxp=
/mxs/Makefile
> > index 96dd31ea19ba..d72ba702b6fa 100644
> > --- a/arch/arm/boot/dts/nxp/mxs/Makefile
> > +++ b/arch/arm/boot/dts/nxp/mxs/Makefile
> > @@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_MXS) +=3D \
> > imx23-sansa.dtb \
> > imx23-stmp378x_devb.dtb \
> > imx23-xfi3.dtb \
> > + imx28-amarula-rmm.dtb \
> > imx28-apf28.dtb \
> > imx28-apf28dev.dtb \
> > imx28-apx4devkit.dtb \
> > diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-amarula-rmm.dts b/arch/arm=
/boot/dts/nxp/mxs/imx28-amarula-rmm.dts
> > new file mode 100644
> > index 000000000000..5ef9b79cda1c
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/nxp/mxs/imx28-amarula-rmm.dts
> > @@ -0,0 +1,301 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2025 Amarula Solutions, Dario Binacchi <dario.binacch=
i@xxxxxxxxxxxxxxxxxxxx>
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "imx28.dtsi"
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +
> > +/ {
> > + compatible =3D "amarula,imx28-rmm", "fsl,imx28";
> > + model =3D "Amarula i.MX28 rmm";
> > +
> > + memory@40000000 {
> > + reg =3D <0x40000000 0x08000000>;
> > + device_type =3D "memory";
> > + };
> > +
> > + backlight {
> > + compatible =3D "pwm-backlight";
> > + pwms =3D <&pwm 4 5000000 0>;
> > + brightness-levels =3D <0 255>;
> > + num-interpolated-steps =3D <255>;
> > + default-brightness-level =3D <255>;
> > + power-supply =3D <&reg_5v>;
> > + };
> > +
> > + beeper {
> > + compatible =3D "pwm-beeper";
> > + pwms =3D <&pwm 7 100000 0>;
> > + };
> > +
> > + leds {
> > + compatible =3D "gpio-leds";
> > + pinctrl-names =3D "default";
> > + pinctrl-0 =3D <&leds_pins>;
> > +
> > + led-0 {
> > + gpios =3D <&gpio2 7 GPIO_ACTIVE_HIGH>;
> > + default-state =3D "off";
> > + };
> > +
> > + led-1 {
> > + gpios =3D <&gpio3 16 GPIO_ACTIVE_HIGH>;
> > + default-state =3D "off";
> > + };
> > +
> > + led-2 {
> > + gpios =3D <&gpio3 17 GPIO_ACTIVE_HIGH>;
> > + default-state =3D "off";
> > + };
> > + };
> > +
> > + reg_1v8: regulator-1v8 {
> > + compatible =3D "regulator-fixed";
> > + regulator-name =3D "1v8";
> > + regulator-min-microvolt =3D <1800000>;
> > + regulator-max-microvolt =3D <1800000>;
> > + };
> > +
> > + reg_3v3: regulator-3v3 {
> > + compatible =3D "regulator-fixed";
> > + regulator-name =3D "3v3";
> > + regulator-min-microvolt =3D <3300000>;
> > + regulator-max-microvolt =3D <3300000>;
> > + regulator-always-on;
> > + };
> > +
> > + reg_5v: regulator-5v {
> > + compatible =3D "regulator-fixed";
> > + regulator-name =3D "5v";
> > + regulator-min-microvolt =3D <5000000>;
> > + regulator-max-microvolt =3D <5000000>;
> > + regulator-always-on;
> > + };
> > +
> > + reg_fec_3v3: regulator-fec-3v3 {
> > + compatible =3D "regulator-fixed";
> > + pinctrl-names =3D "default";
> > + pinctrl-0 =3D <&fec_3v3_enable_pin>;
> > + regulator-name =3D "fec-3v3";
> > + regulator-min-microvolt =3D <3300000>;
> > + regulator-max-microvolt =3D <3300000>;
> > + gpios =3D <&gpio3 27 GPIO_ACTIVE_HIGH>;
> > + enable-active-high;
> > + startup-delay-us =3D <300000>;
> > + vin-supply =3D <&reg_5v>;
> > + };
> > +
> > + reg_usb0_vbus: regulator-usb0-vbus {
> > + compatible =3D "regulator-fixed";
> > + pinctrl-names =3D "default";
> > + pinctrl-0 =3D <&usb0_vbus_enable_pin>;
> > + regulator-name =3D "usb0_vbus";
> > + regulator-min-microvolt =3D <5000000>;
> > + regulator-max-microvolt =3D <5000000>;
> > + gpio =3D <&gpio2 5 GPIO_ACTIVE_HIGH>;
> > + enable-active-high;
> > + regulator-always-on;
> > + };
> > +
> > + reg_usb1_vbus: regulator-usb1-vbus {
> > + compatible =3D "regulator-fixed";
> > + pinctrl-names =3D "default";
> > + pinctrl-0 =3D <&usb1_vbus_enable_pin>;
> > + regulator-name =3D "usb1_vbus";
> > + regulator-min-microvolt =3D <5000000>;
> > + regulator-max-microvolt =3D <5000000>;
> > + gpio =3D <&gpio2 6 GPIO_ACTIVE_HIGH>;
> > + enable-active-high;
> > + regulator-always-on;
> > + };
> > +};
> > +
> > +&auart0 {
> > + pinctrl-names =3D "default";
> > + pinctrl-0 =3D <&auart0_2pins_a>;
> > + status =3D "okay";
> > +};
> > +
> > +&auart1 {
> > + pinctrl-names =3D "default";
> > + pinctrl-0 =3D <&auart1_pins_a>;
> > + status =3D "okay";
> > +};
> > +
> > +&can0 {
> > + pinctrl-names =3D "default";
> > + pinctrl-0 =3D <&can0_pins_a>;
> > + status =3D "okay";
> > +};
> > +
> > +&duart {
> > + pinctrl-names =3D "default";
> > + pinctrl-0 =3D <&duart_pins_b>;
> > + status =3D "okay";
> > +};
> > +
> > +&duart_pins_b {
> > + fsl,voltage =3D <MXS_VOLTAGE_LOW>;
> > +};
> > +
> > +&gpmi {
> > + #address-cells =3D <1>;
> > + #size-cells =3D <0>;
>
> Needn't this, dtsi already set it.

Yes, I can drop #address-cells, it's already set by imx28.dtsi
But I must re-set size-cells.

>
> > + pinctrl-names =3D "default";
> > + pinctrl-0 =3D <&gpmi_pins_a &gpmi_status_cfg>;
> > + status =3D "okay";
> > +};
> > +
> > +&i2c0 {
> > + pinctrl-names =3D "default";
> > + pinctrl-0 =3D <&i2c0_pins_a>;
> > + status =3D "okay";
> > +
> > + touchscreen: touchscreen@38 {
> > + compatible =3D "edt,edt-ft5306";
> > + reg =3D <0x38>;
> > + pinctrl-names =3D "default";
> > + pinctrl-0 =3D <&edt_ft5x06_pins &edt_ft5x06_wake_pin>;
> > + interrupt-parent =3D <&gpio0>;
> > + interrupts =3D <19 IRQ_TYPE_EDGE_RISING>;
> > + reset-gpios =3D <&gpio0 21 GPIO_ACTIVE_LOW>;
> > + wake-gpios =3D <&gpio0 18 GPIO_ACTIVE_HIGH>;
> > + };
> > +};
> > +
> > +&lradc {
> > + status =3D "okay";
> > +};
> > +
> > +&mac0 {
> > + pinctrl-names =3D "default";
> > + pinctrl-0 =3D <&mac0_pins_a>;
> > + phy-mode =3D "rmii";
> > + phy-supply =3D <&reg_fec_3v3>;
> > + phy-handle =3D <&ethphy>;
> > + status =3D "okay";
> > +
> > + mdio {
> > + #address-cells =3D <1>;
> > + #size-cells =3D <0>;
> > +
> > + ethphy: ethernet-phy@0 {
> > + compatible =3D "ethernet-phy-ieee802.3-c22";
> > + reg =3D <0>;
> > + max-speed =3D <100>;
> > + reset-gpios =3D <&gpio3 28 GPIO_ACTIVE_LOW>;
> > + reset-assert-us =3D <4000>;
> > + reset-deassert-us =3D <4000>;
> > + };
> > + };
> > +};
> > +
> > +&pinctrl {
> > + pinctrl-names =3D "default";
> > + pinctrl-0 =3D <&hog_pins_a>;
> > +
> > + edt_ft5x06_pins: edt-ft5x06@0 {
> > + reg =3D <0>;
> > + fsl,pinmux-ids =3D <
> > + MX28_PAD_GPMI_RDY1__GPIO_0_21 /* Reset */
> > + MX28_PAD_GPMI_CE3N__GPIO_0_19 /* Interrupt */
> > + >;
> > + fsl,drive-strength =3D <MXS_DRIVE_4mA>;
> > + fsl,pull-up =3D <MXS_PULL_ENABLE>;
> > + fsl,voltage =3D <MXS_VOLTAGE_HIGH>;
> > + };
> > +
> > + edt_ft5x06_wake_pin: edt-ft5x06-wake@0 {
> > + reg =3D <0>;
>
> Any warning report if all reg is 0?

No, I don't see any warnings of that kind. Nor do I see them for those
contained in imx28.dtsi.

Thanks and regards,
Dario
>
> Frank
> > + fsl,pinmux-ids =3D <MX28_PAD_GPMI_CE2N__GPIO_0_18>;
> > + fsl,drive-strength =3D <MXS_DRIVE_16mA>;
> > + fsl,pull-up =3D <MXS_PULL_DISABLE>;
> > + fsl,voltage =3D <MXS_VOLTAGE_HIGH>;
> > + };
> > +
> > + fec_3v3_enable_pin: fec-3v3-enable@0 {
> > + reg =3D <0>;
> > + fsl,pinmux-ids =3D <MX28_PAD_SPDIF__GPIO_3_27>;
> > + fsl,drive-strength =3D <MXS_DRIVE_4mA>;
> > + fsl,pull-up =3D <MXS_PULL_DISABLE>;
> > + fsl,voltage =3D <MXS_VOLTAGE_HIGH>;
> > + };
> > +
> > + hog_pins_a: hog@0 {
> > + reg =3D <0>;
> > + fsl,pinmux-ids =3D <
> > + MX28_PAD_SSP2_SS1__GPIO_2_20 /* External power *=
/
> > + >;
> > + fsl,drive-strength =3D <MXS_DRIVE_4mA>;
> > + fsl,pull-up =3D <MXS_PULL_DISABLE>;
> > + fsl,voltage =3D <MXS_VOLTAGE_HIGH>;
> > + };
> > +
> > + leds_pins: leds@0 {
> > + reg =3D <0>;
> > + fsl,pinmux-ids =3D <
> > + MX28_PAD_SSP0_DATA7__GPIO_2_7
> > + MX28_PAD_PWM0__GPIO_3_16
> > + MX28_PAD_PWM1__GPIO_3_17
> > + >;
> > + fsl,drive-strength =3D <MXS_DRIVE_4mA>;
> > + fsl,pull-up =3D <MXS_PULL_DISABLE>;
> > + fsl,voltage =3D <MXS_VOLTAGE_HIGH>;
> > + };
> > +
> > + usb0_vbus_enable_pin: usb0-vbus-enable@0 {
> > + reg =3D <0>;
> > + fsl,pinmux-ids =3D <MX28_PAD_SSP0_DATA5__GPIO_2_5>;
> > + fsl,drive-strength =3D <MXS_DRIVE_4mA>;
> > + fsl,pull-up =3D <MXS_PULL_DISABLE>;
> > + fsl,voltage =3D <MXS_VOLTAGE_HIGH>;
> > + };
> > +
> > + usb1_vbus_enable_pin: usb1-vbus-enable@0 {
> > + reg =3D <0>;
> > + fsl,pinmux-ids =3D <MX28_PAD_SSP0_DATA6__GPIO_2_6>;
> > + fsl,drive-strength =3D <MXS_DRIVE_4mA>;
> > + fsl,pull-up =3D <MXS_PULL_DISABLE>;
> > + fsl,voltage =3D <MXS_VOLTAGE_HIGH>;
> > + };
> > +};
> > +
> > +&pwm {
> > + pinctrl-names =3D "default";
> > + pinctrl-0 =3D <&pwm4_pins_a &pwm7_pins_a>;
> > + status =3D "okay";
> > +};
> > +
> > +/* microSD */
> > +&ssp0 {
> > + compatible =3D "fsl,imx28-mmc";
> > + pinctrl-names =3D "default";
> > + pinctrl-0 =3D <&mmc0_4bit_pins_a &mmc0_sck_cfg>;
> > + broken-cd;
> > + bus-width =3D <4>;
> > + status =3D "okay";
> > +};
> > +
> > +&usb0 {
> > + dr_mode =3D "host";
> > + vbus-supply =3D <&reg_usb0_vbus>;
> > + status =3D "okay";
> > +};
> > +
> > +&usb1 {
> > + dr_mode =3D "host";
> > + vbus-supply =3D <&reg_usb1_vbus>;
> > + status =3D "okay";
> > +};
> > +
> > +&usbphy0 {
> > + status =3D "okay";
> > +};
> > +
> > +&usbphy1 {
> > + status =3D "okay";
> > +};
> > --
> > 2.43.0
> >

--=20

Dario Binacchi

Senior Embedded Linux Developer

dario.binacchi@xxxxxxxxxxxxxxxxxxxx

__________________________________

Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
info@xxxxxxxxxxxxxxxxxxxx

www.amarulasolutions.com

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On 29/05/2025 20:52, Yang Shi wrote:
>>>> I just had another conversation about this internally, and there is another
>>>> concern; we obviously don't want to modify the pgtables while other CPUs that
>>>> don't support BBML2 could be accessing them. Even in stop_machine() this may be
>>>> possible if the CPU stacks and task structure (for example) are allocated
>>>> out of
>>>> the linear map.
>>>>
>>>> So we need to be careful to follow the pattern used by kpti; all secondary CPUs
>>>> need to switch to the idmap (which is installed in TTBR0) then install the
>>>> reserved map in TTBR1, then wait for CPU 0 to repaint the linear map, then have
>>>> the secondary CPUs switch TTBR1 back to swapper then switch back out of idmap.
>>> So the below code should be ok?
>>>
>>> cpu_install_idmap()
>>> Busy loop to wait for cpu 0 done
>>> cpu_uninstall_idmap()
>> Once you have installed the idmap, you'll need to call a function by its PA so
>> you are actually executing out of the idmap. And you will need to be in assembly
>> so you don't need the stack, and you'll need to switch TTBR1 to the reserved
>> pgtable, so that the CPU has no access to the swapper pgtable (which CPU 0 is
>> able to modify).
>>
>> You may well be able to reuse __idmap_kpti_secondary in proc.S, or lightly
>> refactor it to work for both the existing idmap_kpti_install_ng_mappings case,
>> and your case.
>
> I'm wondering whether we really need idmap for repainting. I think repainting is
> different from kpti. We just split linear map which is *not* used by kernel
> itself, the mappings for kernel itself is intact, we don't touch it at all. So
> as long as CPU 0 will not repaint the linear map until all other CPUs busy
> looping in stop_machine fn, then we are fine.

But *how* are the other CPUs busy looping? Are they polling a variable? Where
does that variable live? The docs say that a high priority thread is run for
each CPU. So there at least needs to be a task struct and a stack. There are
some Kconfigs where the stack comes from the linear map, so if the variable that
is polls is on its stack (or even on CPU 0's stack then that's a problem. If the
scheduler runs and accesses the task struct which may be allocated from the
linear map (e.g. via kmalloc), that's a problem.

The point is that you have to understand all the details of stop_machine() to be
confident that it is never accessing the linear map. And even if you can prove
that today, there is nothing stopping from the implementation changing in future.

But then you have non-architectural memory accesses too (i.e. speculative
accesses). It's possible that the CPU does a speculative load, which causes the
TLB to do a translation and cache a TLB entry to the linear map. Then CPU 0
changes the pgtable and you have broken the BBM requirements from the secondary
CPU's perspective.

So personally I think the only truely safe way to solve this is to switch the
secondary CPUs to the idmap, then install the reserved map in TTBR1. That way,
the secondary CPUs can't see the swapper pgtable at all and CPU 0 is free to do
what it likes.

>
> We can have two flags to control it. The first one should be a cpu mask, all
> secondary CPUs set its own mask bit to tell CPU 0 it is in stop machine fn
> (ready for repainting). The other flag is used by CPU 0 to tell all secondary
> CPUs repainting is done, please resume. We need have the two flags in kernel
> data section instead of stack.
>
> The code of fn is in kernel text section, the flags are in kernel data section.
> I don't see how come fn (just doing simple busy loop) on secondary CPUs need to
> access linear map while repainting the linear map. After repainting the TLB will
> be flushed before letting secondary CPUs resume, so any access to linear map
> address after that point should be safe too.
>
> Does it sound reasonable to you? Did I miss something?

I think the potential for speculative access is the problem. Personally, I would
follow the pattern laid out by kpti. Then you can more easily defend it by
pointing to an established pattern.

Thanks,
Ryan

>
> Thanks,
> Yang
>
>>
>> Thanks,
>> Ryan
>>
>>>> Given CPU 0 supports BBML2, I think it can just update the linear map live,
>>>> without needing to do the idmap dance?
>>> Yes, I think so too.
>>>
>>> Thanks,
>>> Yang
>>>
>>>> Thanks,
>>>> Ryan
>>>>
>>>>
>>>>> Thanks,
>>>>> Ryan
>>>>>
>

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Subject: Re: [PATCH v3 4/4] tools/testing/selftests: add VMA merge tests for
KSM merge
Content-Language: en-US
To: Lorenzo Stoakes <lorenzo.stoakes@xxxxxxxxxx>,
Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>
Cc: Alexander Viro <viro@xxxxxxxxxxxxxxxxxx>,
Christian Brauner <brauner@xxxxxxxxxx>, Jan Kara <jack@xxxxxxx>,
"Liam R . Howlett" <Liam.Howlett@xxxxxxxxxx>, Jann Horn <jannh@xxxxxxxxxx>,
Pedro Falcato <pfalcato@xxxxxxx>, David Hildenbrand <david@xxxxxxxxxx>,
Xu Xin <xu.xin16@xxxxxxxxxx>, Chengming Zhou <chengming.zhou@xxxxxxxxx>,
linux-mm@xxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx,
linux-fsdevel@xxxxxxxxxxxxxxx, Stefan Roesch <shr@xxxxxxxxxxxx>
References: <cover.1748537921.git.lorenzo.stoakes@xxxxxxxxxx>
<6dec7aabf062c6b121cfac992c9c716cefdda00c.1748537921.git.lorenzo.stoakes@xxxxxxxxxx>
From: Vlastimil Babka <vbabka@xxxxxxx>
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On 5/29/25 19:15, Lorenzo Stoakes wrote:
> Add test to assert that we have now allowed merging of VMAs when KSM
> merging-by-default has been set by prctl(PR_SET_MEMORY_MERGE, ...).
>
> We simply perform a trivial mapping of adjacent VMAs expecting a merge,
> however prior to recent changes implementing this mode earlier than before,
> these merges would not have succeeded.
>
> Assert that we have fixed this!
>
> Signed-off-by: Lorenzo Stoakes <lorenzo.stoakes@xxxxxxxxxx>
> Reviewed-by: Chengming Zhou <chengming.zhou@xxxxxxxxx>
> Tested-by: Chengming Zhou <chengming.zhou@xxxxxxxxx>
> Reviewed-by: Liam R. Howlett <Liam.Howlett@xxxxxxxxxx>

Acked-by: Vlastimil Babka <vbabka@xxxxxxx>

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From: Jiayi Li <lijiayi@xxxxxxxxxx>
To: gregkh@xxxxxxxxxxxxxxxxxxx,
limiao@xxxxxxxxxx,
huanglei@xxxxxxxxxx,
mathias.nyman@xxxxxxxxxxxxxxx,
oneukum@xxxxxxxx
Cc: linux-usb@xxxxxxxxxxxxxxx,
linux-kernel@xxxxxxxxxxxxxxx,
lijiayi@xxxxxxxxxx
Subject: [PATCH v2] usb: quirks: Add NO_LPM quirk for SanDisk Extreme 55AE
Date: Fri, 30 May 2025 15:18:39 +0800
Message-ID: <20250530071839.2110556-1-lijiayi@xxxxxxxxxx>
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This device exhibits I/O errors during file transfers due to unstable
link power management (LPM) behavior. The kernel logs show repeated
warm resets and eventual disconnection when LPM is enabled:

[ 3467.810740] hub 2-0:1.0: state 7 ports 6 chg 0000 evt 0020
[ 3467.810740] usb usb2-port5: do warm reset
[ 3467.866444] usb usb2-port5: not warm reset yet, waiting 50ms
[ 3467.907407] sd 0:0:0:0: [sda] tag#12 sense submit err -19
[ 3467.994423] usb usb2-port5: status 02c0, change 0001, 10.0 Gb/s
[ 3467.994453] usb 2-5: USB disconnect, device number 4

The error -19 (ENODEV) occurs when the device disappears during write
operations. Adding USB_QUIRK_NO_LPM disables link power management
for this specific device, resolving the stability issues.

Signed-off-by: Jiayi Li <lijiayi@xxxxxxxxxx>
---
v1 -> v2: modify a format error.
---
drivers/usb/core/quirks.c | 3 +++
1 file changed, 3 insertions(+)

diff --git a/drivers/usb/core/quirks.c b/drivers/usb/core/quirks.c
index 36d3df7d040c..53d68d20fb62 100644
--- a/drivers/usb/core/quirks.c
+++ b/drivers/usb/core/quirks.c
@@ -372,6 +372,9 @@ static const struct usb_device_id usb_quirk_list[] =3D=
{
/* SanDisk Corp. SanDisk 3.2Gen1 */
{ USB_DEVICE(0x0781, 0x55a3), .driver_info =3D USB_QUIRK_DELAY_INIT },
=20
+ /* SanDisk Extreme 55AE */
+ { USB_DEVICE(0x0781, 0x55ae), .driver_info =3D USB_QUIRK_NO_LPM },
+
/* Realforce 87U Keyboard */
{ USB_DEVICE(0x0853, 0x011b), .driver_info =3D USB_QUIRK_NO_LPM },
=20
--=20
2.47.1

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From: Eugenio Perez Martin <eperezma@xxxxxxxxxx>
Date: Fri, 30 May 2025 09:21:19 +0200
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Subject: Re: [PATCH] virtio-vdpa: Remove virtqueue list
To: Viresh Kumar <viresh.kumar@xxxxxxxxxx>
Cc: "Michael S. Tsirkin" <mst@xxxxxxxxxx>, Jason Wang <jasowang@xxxxxxxxxx>,
Xuan Zhuo <xuanzhuo@xxxxxxxxxxxxxxxxx>, Vincent Guittot <vincent.guittot@xxxxxxxxxx>,
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On Thu, May 29, 2025 at 9:30=E2=80=AFAM Viresh Kumar <viresh.kumar@linaro.o=
rg> wrote:
>
> The virtio vdpa implementation creates a list of virtqueues, while the
> same is already available in the struct virtio_device.
>
> This list is never traversed though, and only the pointer to the struct
> virtio_vdpa_vq_info is used in the callback, where the virtqueue pointer
> could be directly used.
>
> Remove the unwanted code to simplify the driver.
>

Acked-by: Eugenio P=C3=A9rez <eperezma@xxxxxxxxxx>

Thanks!

> Signed-off-by: Viresh Kumar <viresh.kumar@xxxxxxxxxx>
> ---
> Only build tested.
> ---
> drivers/virtio/virtio_vdpa.c | 44 +++---------------------------------
> 1 file changed, 3 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/virtio/virtio_vdpa.c b/drivers/virtio/virtio_vdpa.c
> index 1f60c9d5cb18..e25610e3393a 100644
> --- a/drivers/virtio/virtio_vdpa.c
> +++ b/drivers/virtio/virtio_vdpa.c
> @@ -28,19 +28,6 @@ struct virtio_vdpa_device {
> struct virtio_device vdev;
> struct vdpa_device *vdpa;
> u64 features;
> -
> - /* The lock to protect virtqueue list */
> - spinlock_t lock;
> - /* List of virtio_vdpa_vq_info */
> - struct list_head virtqueues;
> -};
> -
> -struct virtio_vdpa_vq_info {
> - /* the actual virtqueue */
> - struct virtqueue *vq;
> -
> - /* the list node for the virtqueues list */
> - struct list_head node;
> };
>
> static inline struct virtio_vdpa_device *
> @@ -135,9 +122,9 @@ static irqreturn_t virtio_vdpa_config_cb(void *privat=
e)
>
> static irqreturn_t virtio_vdpa_virtqueue_cb(void *private)
> {
> - struct virtio_vdpa_vq_info *info =3D private;
> + struct virtqueue *vq =3D private;
>
> - return vring_interrupt(0, info->vq);
> + return vring_interrupt(0, vq);
> }
>
> static struct virtqueue *
> @@ -145,18 +132,15 @@ virtio_vdpa_setup_vq(struct virtio_device *vdev, un=
signed int index,
> void (*callback)(struct virtqueue *vq),
> const char *name, bool ctx)
> {
> - struct virtio_vdpa_device *vd_dev =3D to_virtio_vdpa_device(vdev)=
;
> struct vdpa_device *vdpa =3D vd_get_vdpa(vdev);
> struct device *dma_dev;
> const struct vdpa_config_ops *ops =3D vdpa->config;
> - struct virtio_vdpa_vq_info *info;
> bool (*notify)(struct virtqueue *vq) =3D virtio_vdpa_notify;
> struct vdpa_callback cb;
> struct virtqueue *vq;
> u64 desc_addr, driver_addr, device_addr;
> /* Assume split virtqueue, switch to packed if necessary */
> struct vdpa_vq_state state =3D {0};
> - unsigned long flags;
> u32 align, max_num, min_num =3D 1;
> bool may_reduce_num =3D true;
> int err;
> @@ -179,10 +163,6 @@ virtio_vdpa_setup_vq(struct virtio_device *vdev, uns=
igned int index,
> if (ops->get_vq_ready(vdpa, index))
> return ERR_PTR(-ENOENT);
>
> - /* Allocate and fill out our active queue description */
> - info =3D kmalloc(sizeof(*info), GFP_KERNEL);
> - if (!info)
> - return ERR_PTR(-ENOMEM);
> if (ops->get_vq_size)
> max_num =3D ops->get_vq_size(vdpa, index);
> else
> @@ -217,7 +197,7 @@ virtio_vdpa_setup_vq(struct virtio_device *vdev, unsi=
gned int index,
>
> /* Setup virtqueue callback */
> cb.callback =3D callback ? virtio_vdpa_virtqueue_cb : NULL;
> - cb.private =3D info;
> + cb.private =3D vq;
> cb.trigger =3D NULL;
> ops->set_vq_cb(vdpa, index, &cb);
> ops->set_vq_num(vdpa, index, virtqueue_get_vring_size(vq));
> @@ -248,13 +228,6 @@ virtio_vdpa_setup_vq(struct virtio_device *vdev, uns=
igned int index,
>
> ops->set_vq_ready(vdpa, index, 1);
>
> - vq->priv =3D info;
> - info->vq =3D vq;
> -
> - spin_lock_irqsave(&vd_dev->lock, flags);
> - list_add(&info->node, &vd_dev->virtqueues);
> - spin_unlock_irqrestore(&vd_dev->lock, flags);
> -
> return vq;
>
> err_vq:
> @@ -263,7 +236,6 @@ virtio_vdpa_setup_vq(struct virtio_device *vdev, unsi=
gned int index,
> ops->set_vq_ready(vdpa, index, 0);
> /* VDPA driver should make sure vq is stopeed here */
> WARN_ON(ops->get_vq_ready(vdpa, index));
> - kfree(info);
> return ERR_PTR(err);
> }
>
> @@ -272,20 +244,12 @@ static void virtio_vdpa_del_vq(struct virtqueue *vq=
)
> struct virtio_vdpa_device *vd_dev =3D to_virtio_vdpa_device(vq->v=
dev);
> struct vdpa_device *vdpa =3D vd_dev->vdpa;
> const struct vdpa_config_ops *ops =3D vdpa->config;
> - struct virtio_vdpa_vq_info *info =3D vq->priv;
> unsigned int index =3D vq->index;
> - unsigned long flags;
> -
> - spin_lock_irqsave(&vd_dev->lock, flags);
> - list_del(&info->node);
> - spin_unlock_irqrestore(&vd_dev->lock, flags);
>
> /* Select and deactivate the queue (best effort) */
> ops->set_vq_ready(vdpa, index, 0);
>
> vring_del_virtqueue(vq);
> -
> - kfree(info);
> }
>
> static void virtio_vdpa_del_vqs(struct virtio_device *vdev)
> @@ -501,8 +465,6 @@ static int virtio_vdpa_probe(struct vdpa_device *vdpa=
)
> vd_dev->vdev.dev.release =3D virtio_vdpa_release_dev;
> vd_dev->vdev.config =3D &virtio_vdpa_config_ops;
> vd_dev->vdpa =3D vdpa;
> - INIT_LIST_HEAD(&vd_dev->virtqueues);
> - spin_lock_init(&vd_dev->lock);
>
> vd_dev->vdev.id.device =3D ops->get_device_id(vdpa);
> if (vd_dev->vdev.id.device =3D=3D 0)
> --
> 2.31.1.272.g89b43f80a514
>

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From: Romain Gantois <romain.gantois@xxxxxxxxxxx>
To: "Russell King (Oracle)" <linux@xxxxxxxxxxxxxxx>
Cc: Maxime Chevallier <maxime.chevallier@xxxxxxxxxxx>, davem@xxxxxxxxxxxxx,
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=?UTF-8?B?S8O2cnk=?= Maincent <kory.maincent@xxxxxxxxxxx>,
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Rob Herring <robh@xxxxxxxxxx>, Daniel Golle <daniel@xxxxxxxxxxxxxx>,
Dimitri Fedrau <dimitri.fedrau@xxxxxxxxxxxx>
Subject:
Re: [PATCH net-next v6 06/14] net: phy: Introduce generic SFP handling for
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From: Romain Gantois <romain.gantois@xxxxxxxxxxx>
To: "Russell King (Oracle)" <linux@xxxxxxxxxxxxxxx>
Date: Fri, 30 May 2025 09:28:11 +0200
Message-ID: <6159237.lOV4Wx5bFT@fw-rgant>
In-Reply-To: <aDhfyiSOnyA709oX@xxxxxxxxxxxxxxxxxxxxx>
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On Thursday, 29 May 2025 15:23:22 CEST Russell King (Oracle) wrote:
> On Wed, May 28, 2025 at 09:35:35AM +0200, Romain Gantois wrote:
> > > In that regard, you can consider 1000BaseX as a MII mode (we do have
> > > PHY_INTERFACE_MODE_1000BASEX).
> >
> > Ugh, the "1000BaseX" terminology never ceases to confuse me, but yes
> > you're
> > right.
>
> 1000BASE-X is exactly what is described in IEEE 802.3. It's a PHY
> interface mode because PHYs that use SerDes can connect to the host
> using SGMII or 1000BASE-X over the serial link.
>
> 1000BASE-X's purpose in IEEE 802.3 is as a protocol for use over
> fibre links, as the basis for 1000BASE-SX, 1000BASE-LX, 1000BASE-EX
> etc where the S, L, E etc are all to do with the properties of the
> medium that the electrical 1000BASE-X is sent over. It even includes
> 1000BASE-CX which is over copper cable.

Ah makes sense, thanks for the explanation. I guess my mistake was assuming
that MAC/PHY interface modes were necessarily strictly at the reconciliation
sublayer level, and didn't include PCS/PMA functions.

Thanks,

--
Romain Gantois, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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From: Yuanfang Zhang <quic_yuanfang@xxxxxxxxxxx>
Date: Fri, 30 May 2025 15:29:14 +0800
Subject: [PATCH] coresight-tpdm: add trace_id sysfs node
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The trace ID of TPMD is the trace ID of the TPDA or TNOC
which it is connected to, this change adds trace_id sysfs
node to expose this trace id to userspace.

Signed-off-by: Yuanfang Zhang <quic_yuanfang@xxxxxxxxxxx>
---
drivers/hwtracing/coresight/coresight-tpdm.c | 16 ++++++++++++++++
drivers/hwtracing/coresight/coresight-tpdm.h | 2 ++
2 files changed, 18 insertions(+)

diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c
index 7214e65097ec9ac69f6c7c9278bcd28d25945c9e..8a5d115157924f39b09f8e3005827d7d64aa376c 100644
--- a/drivers/hwtracing/coresight/coresight-tpdm.c
+++ b/drivers/hwtracing/coresight/coresight-tpdm.c
@@ -497,6 +497,9 @@ static int tpdm_enable(struct coresight_device *csdev, struct perf_event *event,

__tpdm_enable(drvdata);
drvdata->enable = true;
+
+ if (path)
+ drvdata->traceid = path->trace_id;
spin_unlock(&drvdata->spinlock);

dev_dbg(drvdata->dev, "TPDM tracing enabled\n");
@@ -554,6 +557,7 @@ static void tpdm_disable(struct coresight_device *csdev,
__tpdm_disable(drvdata);
coresight_set_mode(csdev, CS_MODE_DISABLED);
drvdata->enable = false;
+ drvdata->traceid = 0;
spin_unlock(&drvdata->spinlock);

dev_dbg(drvdata->dev, "TPDM tracing disabled\n");
@@ -655,9 +659,21 @@ static ssize_t integration_test_store(struct device *dev,
}
static DEVICE_ATTR_WO(integration_test);

+static ssize_t traceid_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ unsigned long val;
+ struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
+
+ val = drvdata->traceid;
+ return sprintf(buf, "%#lx\n", val);
+}
+static DEVICE_ATTR_RO(traceid);
+
static struct attribute *tpdm_attrs[] = {
&dev_attr_reset_dataset.attr,
&dev_attr_integration_test.attr,
+ &dev_attr_traceid.attr,
NULL,
};

diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h b/drivers/hwtracing/coresight/coresight-tpdm.h
index b117543897344b689f666f6890cabb59c8ee4869..e12a64f265daa86f1b82fa3640e271e8386f99af 100644
--- a/drivers/hwtracing/coresight/coresight-tpdm.h
+++ b/drivers/hwtracing/coresight/coresight-tpdm.h
@@ -300,6 +300,7 @@ struct cmb_dataset {
* @cmb Specifics associated to TPDM CMB.
* @dsb_msr_num Number of MSR supported by DSB TPDM
* @cmb_msr_num Number of MSR supported by CMB TPDM
+ * @traceid: Value of the current ID for this component.
*/

struct tpdm_drvdata {
@@ -313,6 +314,7 @@ struct tpdm_drvdata {
struct cmb_dataset *cmb;
u32 dsb_msr_num;
u32 cmb_msr_num;
+ u8 traceid;
};

/* Enumerate members of various datasets */

---
base-commit: 94305e83eccb3120c921cd3a015cd74731140bac
change-id: 20250523-showtraceid-2df91c89be8f

Best regards,
--
Yuanfang Zhang <quic_yuanfang@xxxxxxxxxxx>

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The current 'admin_timeout' and 'io_timeout' parameters in
the NVMe driver are global, meaning they apply to all NVMe
devices in the system. However, in certain scenarios, it is
necessary to set separate timeout values for different
types of NVMe devices.

To address this requirement, we propose adding two new fields,
'admin_timeout' and 'io_timeout', to the sysfs interface for
each NVMe device. By default, these values will be consistent
with the global parameters. If a user sets these values
individually for a specific device, the user-defined values
will take precedence.

Usage example:
To set admin_timeout=100 and io_timeout=50 for the NVMe device nvme1,
use the following commands:

echo 100 > /sys/class/nvme/nvme1/admin_timeout
echo 50 > /sys/class/nvme/nvme1/io_timeout

Signed-off-by: Bitao Hu <yaoma@xxxxxxxxxxxxxxxxx>
---
drivers/nvme/host/apple.c | 2 +-
drivers/nvme/host/core.c | 6 ++--
drivers/nvme/host/nvme.h | 2 +-
drivers/nvme/host/pci.c | 4 +--
drivers/nvme/host/rdma.c | 2 +-
drivers/nvme/host/sysfs.c | 62 +++++++++++++++++++++++++++++++++++++++
drivers/nvme/host/tcp.c | 2 +-
7 files changed, 71 insertions(+), 9 deletions(-)

diff --git a/drivers/nvme/host/apple.c b/drivers/nvme/host/apple.c
index b1fddfa33ab9..ec7c7cfcdf5b 100644
--- a/drivers/nvme/host/apple.c
+++ b/drivers/nvme/host/apple.c
@@ -821,7 +821,7 @@ static void apple_nvme_disable(struct apple_nvme *anv, bool shutdown)
* doing a safe shutdown.
*/
if (!dead && shutdown && freeze)
- nvme_wait_freeze_timeout(&anv->ctrl, NVME_IO_TIMEOUT);
+ nvme_wait_freeze_timeout(&anv->ctrl);

nvme_quiesce_io_queues(&anv->ctrl);

diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c
index f69a232a000a..32eade3418f8 100644
--- a/drivers/nvme/host/core.c
+++ b/drivers/nvme/host/core.c
@@ -725,11 +725,10 @@ void nvme_init_request(struct request *req, struct nvme_command *cmd)
struct nvme_ns *ns = req->q->disk->private_data;

logging_enabled = ns->head->passthru_err_log_enabled;
- req->timeout = NVME_IO_TIMEOUT;
} else { /* no queuedata implies admin queue */
logging_enabled = nr->ctrl->passthru_err_log_enabled;
- req->timeout = NVME_ADMIN_TIMEOUT;
}
+ req->timeout = req->q->rq_timeout;

if (!logging_enabled)
req->rq_flags |= RQF_QUIET;
@@ -5174,10 +5173,11 @@ void nvme_unfreeze(struct nvme_ctrl *ctrl)
}
EXPORT_SYMBOL_GPL(nvme_unfreeze);

-int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
+int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl)
{
struct nvme_ns *ns;
int srcu_idx;
+ long timeout = ctrl->tagset->timeout;

srcu_idx = srcu_read_lock(&ctrl->srcu);
list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
diff --git a/drivers/nvme/host/nvme.h b/drivers/nvme/host/nvme.h
index ad0c1f834f09..50b5f2848f85 100644
--- a/drivers/nvme/host/nvme.h
+++ b/drivers/nvme/host/nvme.h
@@ -833,7 +833,7 @@ void nvme_sync_queues(struct nvme_ctrl *ctrl);
void nvme_sync_io_queues(struct nvme_ctrl *ctrl);
void nvme_unfreeze(struct nvme_ctrl *ctrl);
void nvme_wait_freeze(struct nvme_ctrl *ctrl);
-int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
+int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl);
void nvme_start_freeze(struct nvme_ctrl *ctrl);

static inline enum req_op nvme_req_op(struct nvme_command *cmd)
diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index e0bfe04a2bc2..e0b29b385d0b 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -2690,7 +2690,7 @@ static bool __nvme_delete_io_queues(struct nvme_dev *dev, u8 opcode)
unsigned long timeout;

retry:
- timeout = NVME_ADMIN_TIMEOUT;
+ timeout = dev->ctrl.admin_q->rq_timeout;
while (nr_queues > 0) {
if (nvme_delete_queue(&dev->queues[nr_queues], opcode))
break;
@@ -2871,7 +2871,7 @@ static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown)
* if doing a safe shutdown.
*/
if (!dead && shutdown)
- nvme_wait_freeze_timeout(&dev->ctrl, NVME_IO_TIMEOUT);
+ nvme_wait_freeze_timeout(&dev->ctrl);
}

nvme_quiesce_io_queues(&dev->ctrl);
diff --git a/drivers/nvme/host/rdma.c b/drivers/nvme/host/rdma.c
index b5a0295b5bf4..01a9250810cf 100644
--- a/drivers/nvme/host/rdma.c
+++ b/drivers/nvme/host/rdma.c
@@ -888,7 +888,7 @@ static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
if (!new) {
nvme_start_freeze(&ctrl->ctrl);
nvme_unquiesce_io_queues(&ctrl->ctrl);
- if (!nvme_wait_freeze_timeout(&ctrl->ctrl, NVME_IO_TIMEOUT)) {
+ if (!nvme_wait_freeze_timeout(&ctrl->ctrl)) {
/*
* If we timed out waiting for freeze we are likely to
* be stuck. Fail the controller initialization just
diff --git a/drivers/nvme/host/sysfs.c b/drivers/nvme/host/sysfs.c
index 29430949ce2f..9b8c29435bfa 100644
--- a/drivers/nvme/host/sysfs.c
+++ b/drivers/nvme/host/sysfs.c
@@ -10,6 +10,66 @@
#include "nvme.h"
#include "fabrics.h"

+static ssize_t admin_timeout_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
+
+ return sysfs_emit(buf, "%u\n", ctrl->admin_tagset->timeout / HZ);
+}
+
+static ssize_t admin_timeout_store(struct device *dev,
+ struct device_attribute *attr, const char *buf,
+ size_t count)
+{
+ int ret;
+ unsigned int timeout;
+ struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
+
+ ret = kstrtouint(buf, 10, &timeout);
+ if (ret < 0 || timeout == 0)
+ return -EINVAL;
+
+ timeout = timeout * HZ;
+ ctrl->admin_tagset->timeout = timeout;
+ blk_queue_rq_timeout(ctrl->admin_q, timeout);
+
+ return count;
+}
+static DEVICE_ATTR_RW(admin_timeout);
+
+static ssize_t io_timeout_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
+
+ return sysfs_emit(buf, "%u\n", ctrl->tagset->timeout / HZ);
+}
+
+static ssize_t io_timeout_store(struct device *dev,
+ struct device_attribute *attr, const char *buf,
+ size_t count)
+{
+ int ret, srcu_idx;
+ unsigned int timeout;
+ struct nvme_ns *ns;
+ struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
+
+ ret = kstrtouint(buf, 10, &timeout);
+ if (ret < 0 || timeout == 0)
+ return -EINVAL;
+
+ timeout = timeout * HZ;
+ ctrl->tagset->timeout = timeout;
+ srcu_idx = srcu_read_lock(&ctrl->srcu);
+ list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
+ srcu_read_lock_held(&ctrl->srcu)) {
+ blk_queue_rq_timeout(ns->queue, timeout);
+ }
+ srcu_read_unlock(&ctrl->srcu, srcu_idx);
+
+ return count;
+}
+static DEVICE_ATTR_RW(io_timeout);
+
static ssize_t nvme_sysfs_reset(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
@@ -722,6 +782,8 @@ static DEVICE_ATTR(dhchap_ctrl_secret, S_IRUGO | S_IWUSR,
static struct attribute *nvme_dev_attrs[] = {
&dev_attr_reset_controller.attr,
&dev_attr_rescan_controller.attr,
+ &dev_attr_admin_timeout.attr,
+ &dev_attr_io_timeout.attr,
&dev_attr_model.attr,
&dev_attr_serial.attr,
&dev_attr_firmware_rev.attr,
diff --git a/drivers/nvme/host/tcp.c b/drivers/nvme/host/tcp.c
index f6379aa33d77..c66c98e2cfe4 100644
--- a/drivers/nvme/host/tcp.c
+++ b/drivers/nvme/host/tcp.c
@@ -2169,7 +2169,7 @@ static int nvme_tcp_configure_io_queues(struct nvme_ctrl *ctrl, bool new)
if (!new) {
nvme_start_freeze(ctrl);
nvme_unquiesce_io_queues(ctrl);
- if (!nvme_wait_freeze_timeout(ctrl, NVME_IO_TIMEOUT)) {
+ if (!nvme_wait_freeze_timeout(ctrl)) {
/*
* If we timed out waiting for freeze we are likely to
* be stuck. Fail the controller initialization just
--
2.39.5 (Apple Git-154)

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From: Fenglin Wu via B4 Relay <devnull+fenglin.wu.oss.qualcomm.com@xxxxxxxxxx>
Date: Fri, 30 May 2025 15:35:07 +0800
Subject: [PATCH v2 2/8] power: supply: core: Add state_of_health power
supply property
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From: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>

Add state_of_health power supply property to represent battery
health percentage.

Signed-off-by: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>
---
Documentation/ABI/testing/sysfs-class-power | 10 ++++++++++
drivers/power/supply/power_supply_sysfs.c | 1 +
include/linux/power_supply.h | 1 +
3 files changed, 12 insertions(+)

diff --git a/Documentation/ABI/testing/sysfs-class-power b/Documentation/ABI/testing/sysfs-class-power
index 22a565a6a1c509461b8c483e12975295765121d6..74e0d4d67467500c3cd62da3ae0b2e4a67e77680 100644
--- a/Documentation/ABI/testing/sysfs-class-power
+++ b/Documentation/ABI/testing/sysfs-class-power
@@ -562,6 +562,16 @@ Description:

Valid values: Represented in microohms

+What: /sys/class/power_supply/<supply_name>/state_of_health
+Date: May 2025
+Contact: linux-arm-msm@xxxxxxxxxxxxxxx
+Description:
+ Reports battery power supply state of health in percentage.
+
+ Access: Read
+
+ Valid values: 0 - 100 (percent)
+
**USB Properties**

What: /sys/class/power_supply/<supply_name>/input_current_limit
diff --git a/drivers/power/supply/power_supply_sysfs.c b/drivers/power/supply/power_supply_sysfs.c
index dd829148eb6fda5dcd7eab53fc70f99081763714..12af0d0398822ff23d8970f6bdc8e3ef68081a1d 100644
--- a/drivers/power/supply/power_supply_sysfs.c
+++ b/drivers/power/supply/power_supply_sysfs.c
@@ -221,6 +221,7 @@ static struct power_supply_attr power_supply_attrs[] __ro_after_init = {
POWER_SUPPLY_ATTR(MANUFACTURE_MONTH),
POWER_SUPPLY_ATTR(MANUFACTURE_DAY),
POWER_SUPPLY_ATTR(RESISTANCE),
+ POWER_SUPPLY_ATTR(STATE_OF_HEALTH),
/* Properties of type `const char *' */
POWER_SUPPLY_ATTR(MODEL_NAME),
POWER_SUPPLY_ATTR(MANUFACTURER),
diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h
index de3e88810e322546470b21258913abc7707c86a7..dd0108940231352ac6c6f0fa962d1ea904d81c7a 100644
--- a/include/linux/power_supply.h
+++ b/include/linux/power_supply.h
@@ -175,6 +175,7 @@ enum power_supply_property {
POWER_SUPPLY_PROP_MANUFACTURE_MONTH,
POWER_SUPPLY_PROP_MANUFACTURE_DAY,
POWER_SUPPLY_PROP_RESISTANCE,
+ POWER_SUPPLY_PROP_STATE_OF_HEALTH,
/* Properties of type `const char *' */
POWER_SUPPLY_PROP_MODEL_NAME,
POWER_SUPPLY_PROP_MANUFACTURER,

--
2.34.1

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From: Fenglin Wu via B4 Relay <devnull+fenglin.wu.oss.qualcomm.com@xxxxxxxxxx>
Date: Fri, 30 May 2025 15:35:08 +0800
Subject: [PATCH v2 3/8] power: supply: qcom_battmgr: Add resistance power
supply property
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From: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>

Add power supply property to get battery resistance from the battery
management firmware.

Signed-off-by: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>
---
drivers/power/supply/qcom_battmgr.c | 10 ++++++++++
1 file changed, 10 insertions(+)

diff --git a/drivers/power/supply/qcom_battmgr.c b/drivers/power/supply/qcom_battmgr.c
index fe27676fbc7cd12292caa6fb3b5b46a18c426e6d..bc521f60f67fa427cc03b51c44adaeb46ae746f5 100644
--- a/drivers/power/supply/qcom_battmgr.c
+++ b/drivers/power/supply/qcom_battmgr.c
@@ -2,6 +2,7 @@
/*
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2022, Linaro Ltd
+ * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/auxiliary_bus.h>
#include <linux/module.h>
@@ -254,6 +255,7 @@ struct qcom_battmgr_status {
unsigned int voltage_now;
unsigned int voltage_ocv;
unsigned int temperature;
+ unsigned int resistance;

unsigned int discharge_time;
unsigned int charge_time;
@@ -418,6 +420,7 @@ static const u8 sm8350_bat_prop_map[] = {
[POWER_SUPPLY_PROP_MODEL_NAME] = BATT_MODEL_NAME,
[POWER_SUPPLY_PROP_TIME_TO_FULL_AVG] = BATT_TTF_AVG,
[POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG] = BATT_TTE_AVG,
+ [POWER_SUPPLY_PROP_RESISTANCE] = BATT_RESISTANCE,
[POWER_SUPPLY_PROP_POWER_NOW] = BATT_POWER_NOW,
};

@@ -582,6 +585,9 @@ static int qcom_battmgr_bat_get_property(struct power_supply *psy,
case POWER_SUPPLY_PROP_TEMP:
val->intval = battmgr->status.temperature;
break;
+ case POWER_SUPPLY_PROP_RESISTANCE:
+ val->intval = battmgr->status.resistance;
+ break;
case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG:
val->intval = battmgr->status.discharge_time;
break;
@@ -665,6 +671,7 @@ static const enum power_supply_property sm8350_bat_props[] = {
POWER_SUPPLY_PROP_MODEL_NAME,
POWER_SUPPLY_PROP_TIME_TO_FULL_AVG,
POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
+ POWER_SUPPLY_PROP_RESISTANCE,
POWER_SUPPLY_PROP_POWER_NOW,
};

@@ -1174,6 +1181,9 @@ static void qcom_battmgr_sm8350_callback(struct qcom_battmgr *battmgr,
case BATT_TTE_AVG:
battmgr->status.discharge_time = le32_to_cpu(resp->intval.value);
break;
+ case BATT_RESISTANCE:
+ battmgr->status.resistance = le32_to_cpu(resp->intval.value);
+ break;
case BATT_POWER_NOW:
battmgr->status.power_now = le32_to_cpu(resp->intval.value);
break;

--
2.34.1

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From: Fenglin Wu via B4 Relay <devnull+fenglin.wu.oss.qualcomm.com@xxxxxxxxxx>
Date: Fri, 30 May 2025 15:35:06 +0800
Subject: [PATCH v2 1/8] power: supply: core: Add resistance power supply
property
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From: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>

Some battery drivers provide the ability to export resistance as a
parameter. Add resistance power supply property for that purpose.

Signed-off-by: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>
---
Documentation/ABI/testing/sysfs-class-power | 10 ++++++++++
drivers/power/supply/power_supply_sysfs.c | 1 +
include/linux/power_supply.h | 1 +
3 files changed, 12 insertions(+)

diff --git a/Documentation/ABI/testing/sysfs-class-power b/Documentation/ABI/testing/sysfs-class-power
index 560124cc31770cde03bcdbbba0d85a5bd78b15a0..22a565a6a1c509461b8c483e12975295765121d6 100644
--- a/Documentation/ABI/testing/sysfs-class-power
+++ b/Documentation/ABI/testing/sysfs-class-power
@@ -552,6 +552,16 @@ Description:
Integer > 0: representing full cycles
Integer = 0: cycle_count info is not available

+What: /sys/class/power_supply/<supply_name>/resistance
+Date: May 2025
+Contact: linux-arm-msm@xxxxxxxxxxxxxxx
+Description:
+ Reports the resistance of the battery power supply.
+
+ Access: Read
+
+ Valid values: Represented in microohms
+
**USB Properties**

What: /sys/class/power_supply/<supply_name>/input_current_limit
diff --git a/drivers/power/supply/power_supply_sysfs.c b/drivers/power/supply/power_supply_sysfs.c
index a438f7983d4f6a832e9d479184c7c35453e1757c..dd829148eb6fda5dcd7eab53fc70f99081763714 100644
--- a/drivers/power/supply/power_supply_sysfs.c
+++ b/drivers/power/supply/power_supply_sysfs.c
@@ -220,6 +220,7 @@ static struct power_supply_attr power_supply_attrs[] __ro_after_init = {
POWER_SUPPLY_ATTR(MANUFACTURE_YEAR),
POWER_SUPPLY_ATTR(MANUFACTURE_MONTH),
POWER_SUPPLY_ATTR(MANUFACTURE_DAY),
+ POWER_SUPPLY_ATTR(RESISTANCE),
/* Properties of type `const char *' */
POWER_SUPPLY_ATTR(MODEL_NAME),
POWER_SUPPLY_ATTR(MANUFACTURER),
diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h
index c4cb854971f53a244ba7742a15ce7a5515da6199..de3e88810e322546470b21258913abc7707c86a7 100644
--- a/include/linux/power_supply.h
+++ b/include/linux/power_supply.h
@@ -174,6 +174,7 @@ enum power_supply_property {
POWER_SUPPLY_PROP_MANUFACTURE_YEAR,
POWER_SUPPLY_PROP_MANUFACTURE_MONTH,
POWER_SUPPLY_PROP_MANUFACTURE_DAY,
+ POWER_SUPPLY_PROP_RESISTANCE,
/* Properties of type `const char *' */
POWER_SUPPLY_PROP_MODEL_NAME,
POWER_SUPPLY_PROP_MANUFACTURER,

--
2.34.1

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Subject: [PATCH v2 0/8] power: supply: Add several features support in
qcom-battmgr driver
Date: Fri, 30 May 2025 15:35:05 +0800
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X-Change-ID: 20250520-qcom_battmgr_update-3561dc526c05
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Add following features in qcom-battmgr drivers as the battery management
firmware has provided such capabilities:
- Add resistance power supply property in core driver and qcom-battmgr
driver to get battery resistance
- Add state_of_health power supply property in core driver and
qcom-battmgr driver to get battery health percentage
- Add charge control start/end threshold control by using
charge_control_start_threshold and charge_control_end_threshold power
supply properties

The changes have been tested on QRD8650 and X1E80100-CRD devices based on
qcom/linux.git for-next commit f8d04825b12f42ec8198dee1ab4654792f9ac231.

Signed-off-by: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>
---
Changes in v2:
- Corrected "qcom-battmgr" to "qcom_battmgr" in the commit subject of
patch 4/5.
- Added charge control support for X1E80100 platform in patch 5.
- X1E80100 is no longer a fallback of SM8550 in pmic-glink battmgr support,
hence added patch 6 in the pmic-glink binding to move X1E80100 out of the
fallbacks.
- Added patch 7 in glink-ucsi driver to include UCSI quirk for X1E80100
platform
- Added patch 8 to remove "qcom,sm8550-pmic-glink" compatible string in
x1* board files.
- Rebased the changes on qcom/linux.git for-next commit 44ef9ab4baaf496d227ab98d368016700f0b9300.
- Link to v1: https://lore.kernel.org/r/20250523-qcom_battmgr_update-v1-0-2bb6d4e0a56e@xxxxxxxxxxxxxxxx

---
Fenglin Wu (8):
power: supply: core: Add resistance power supply property
power: supply: core: Add state_of_health power supply property
power: supply: qcom_battmgr: Add resistance power supply property
power: supply: qcom_battmgr: Add state_of_health property
power: supply: qcom_battmgr: Add charge control support
dt-bindings: soc: qcom: pmic-glink: Move X1E80100 out of fallbacks
usb: typec: ucsi_glink: Add UCSI quirk for X1E80100 platform
arm64: dts: qcom: x1*: Remove qcom,sm8550-pmic-glink fallback

Documentation/ABI/testing/sysfs-class-power | 20 ++
.../bindings/soc/qcom/qcom,pmic-glink.yaml | 4 +-
arch/arm64/boot/dts/qcom/x1-crd.dtsi | 1 -
arch/arm64/boot/dts/qcom/x1e001de-devkit.dts | 1 -
.../dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi | 1 -
.../boot/dts/qcom/x1e80100-asus-vivobook-s15.dts | 1 -
.../boot/dts/qcom/x1e80100-dell-xps13-9345.dts | 1 -
.../boot/dts/qcom/x1e80100-hp-omnibook-x14.dts | 1 -
.../boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts | 1 -
.../boot/dts/qcom/x1e80100-microsoft-romulus.dtsi | 1 -
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 1 -
drivers/power/supply/power_supply_sysfs.c | 2 +
drivers/power/supply/qcom_battmgr.c | 275 ++++++++++++++++++++-
drivers/usb/typec/ucsi/ucsi_glink.c | 1 +
include/linux/power_supply.h | 2 +
15 files changed, 295 insertions(+), 18 deletions(-)
---
base-commit: abbf1025002e4966bfcbf8a069234e485d49edf1
change-id: 20250520-qcom_battmgr_update-3561dc526c05

Best regards,
--
Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>

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Date: Fri, 30 May 2025 15:35:09 +0800
Subject: [PATCH v2 4/8] power: supply: qcom_battmgr: Add state_of_health
property
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From: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>

Add state_of_health property to read battery health percentage from
battery management firmware.

Signed-off-by: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>
---
drivers/power/supply/qcom_battmgr.c | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/drivers/power/supply/qcom_battmgr.c b/drivers/power/supply/qcom_battmgr.c
index bc521f60f67fa427cc03b51c44adaeb46ae746f5..d5d0200b92bdc3d9a22f44159ad45b152efe8be0 100644
--- a/drivers/power/supply/qcom_battmgr.c
+++ b/drivers/power/supply/qcom_battmgr.c
@@ -256,6 +256,7 @@ struct qcom_battmgr_status {
unsigned int voltage_ocv;
unsigned int temperature;
unsigned int resistance;
+ unsigned int soh_percent;

unsigned int discharge_time;
unsigned int charge_time;
@@ -421,6 +422,7 @@ static const u8 sm8350_bat_prop_map[] = {
[POWER_SUPPLY_PROP_TIME_TO_FULL_AVG] = BATT_TTF_AVG,
[POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG] = BATT_TTE_AVG,
[POWER_SUPPLY_PROP_RESISTANCE] = BATT_RESISTANCE,
+ [POWER_SUPPLY_PROP_STATE_OF_HEALTH] = BATT_SOH,
[POWER_SUPPLY_PROP_POWER_NOW] = BATT_POWER_NOW,
};

@@ -588,6 +590,9 @@ static int qcom_battmgr_bat_get_property(struct power_supply *psy,
case POWER_SUPPLY_PROP_RESISTANCE:
val->intval = battmgr->status.resistance;
break;
+ case POWER_SUPPLY_PROP_STATE_OF_HEALTH:
+ val->intval = battmgr->status.soh_percent;
+ break;
case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG:
val->intval = battmgr->status.discharge_time;
break;
@@ -672,6 +677,7 @@ static const enum power_supply_property sm8350_bat_props[] = {
POWER_SUPPLY_PROP_TIME_TO_FULL_AVG,
POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
POWER_SUPPLY_PROP_RESISTANCE,
+ POWER_SUPPLY_PROP_STATE_OF_HEALTH,
POWER_SUPPLY_PROP_POWER_NOW,
};

@@ -1141,6 +1147,9 @@ static void qcom_battmgr_sm8350_callback(struct qcom_battmgr *battmgr,
case BATT_CAPACITY:
battmgr->status.percent = le32_to_cpu(resp->intval.value) / 100;
break;
+ case BATT_SOH:
+ battmgr->status.soh_percent = le32_to_cpu(resp->intval.value);
+ break;
case BATT_VOLT_OCV:
battmgr->status.voltage_ocv = le32_to_cpu(resp->intval.value);
break;

--
2.34.1

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From: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>

Currently, the Qualcomm X1E80100 is treated as a fallback of SM8550
in pmic-glink support. However, the battmgr driver, which uses the
same pmic-glink compatible strings, has implemented charge control
functionality differently between SM8550 and X1E80100. As a result,
X1E80100 is no longer a fallback of SM8550 in pmic-glink support.

Therefore, add match data for X1E80100 separately in ucsi_glink driver
but keep the UCSI quirk the same as SM8550.

Signed-off-by: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>
---
drivers/usb/typec/ucsi/ucsi_glink.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/drivers/usb/typec/ucsi/ucsi_glink.c b/drivers/usb/typec/ucsi/ucsi_glink.c
index 8af79101a2fc75ae17be1d119b25a9c862e010b3..b10c3161fd577f672d15602023c1aa71a1ab4fe6 100644
--- a/drivers/usb/typec/ucsi/ucsi_glink.c
+++ b/drivers/usb/typec/ucsi/ucsi_glink.c
@@ -319,6 +319,7 @@ static const struct of_device_id pmic_glink_ucsi_of_quirks[] = {
{ .compatible = "qcom,sm8350-pmic-glink", .data = &quirk_sc8180x, },
{ .compatible = "qcom,sm8450-pmic-glink", .data = &quirk_sm8450, },
{ .compatible = "qcom,sm8550-pmic-glink", .data = &quirk_sm8450, },
+ { .compatible = "qcom,x1e80100-pmic-glink", .data = &quirk_sm8450, },
{}
};

--
2.34.1

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From: Fenglin Wu via B4 Relay <devnull+fenglin.wu.oss.qualcomm.com@xxxxxxxxxx>
Date: Fri, 30 May 2025 15:35:11 +0800
Subject: [PATCH v2 6/8] dt-bindings: soc: qcom: pmic-glink: Move X1E80100
out of fallbacks
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From: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>

Move X1E80100 out of the fallbacks of SM8550 in pmic-glink support.

Signed-off-by: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>
---
Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
index 4c9e78f29523e3d77aacb4299f64ab96f9b1a831..972bec151118f2e20e1f3b4e0c0a8fbbbea7ab90 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
@@ -39,9 +39,11 @@ properties:
- enum:
- qcom,sm8650-pmic-glink
- qcom,sm8750-pmic-glink
- - qcom,x1e80100-pmic-glink
- const: qcom,sm8550-pmic-glink
- const: qcom,pmic-glink
+ - items:
+ - const: qcom,x1e80100-pmic-glink
+ - const: qcom,pmic-glink

'#address-cells':
const: 1

--
2.34.1

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From: Fenglin Wu via B4 Relay <devnull+fenglin.wu.oss.qualcomm.com@xxxxxxxxxx>
Date: Fri, 30 May 2025 15:35:13 +0800
Subject: [PATCH v2 8/8] arm64: dts: qcom: x1*: Remove
qcom,sm8550-pmic-glink fallback
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From: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>

The "qcom,x1e80100-pmic-glink" is not longer a fallback compatible
string of "qcom,sm8550-pmic-glink", so remove "qcom,sm8550-pmic-glink"
in x1* platform pmic-glink device nodes.

Signed-off-by: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/x1-crd.dtsi | 1 -
arch/arm64/boot/dts/qcom/x1e001de-devkit.dts | 1 -
arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi | 1 -
arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts | 1 -
arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts | 1 -
arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts | 1 -
arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts | 1 -
arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi | 1 -
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 1 -
9 files changed, 9 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/x1-crd.dtsi b/arch/arm64/boot/dts/qcom/x1-crd.dtsi
index c9f0d505267081af66b0973fe6c1e33832a2c86b..33d908c8011abe7bbbaca539bb9724f12c679c68 100644
--- a/arch/arm64/boot/dts/qcom/x1-crd.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1-crd.dtsi
@@ -74,7 +74,6 @@ switch-lid {

pmic-glink {
compatible = "qcom,x1e80100-pmic-glink",
- "qcom,sm8550-pmic-glink",
"qcom,pmic-glink";
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
index 2d9627e6c7983daedba87619ba01074ee22b43c9..d6ad762b8f30cc586761fc75ba95608301b3f599 100644
--- a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
+++ b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
@@ -51,7 +51,6 @@ chosen {

pmic-glink {
compatible = "qcom,x1e80100-pmic-glink",
- "qcom,sm8550-pmic-glink",
"qcom,pmic-glink";
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi b/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi
index ac1dddf27da30e6a9f7e1d1ecbd5192bf2d0671e..00e6009e3e4e89e4ca45c2d1b1f20e8caaa85bbf 100644
--- a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi
@@ -64,7 +64,6 @@ switch-lid {

pmic-glink {
compatible = "qcom,x1e80100-pmic-glink",
- "qcom,sm8550-pmic-glink",
"qcom,pmic-glink";
orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
<&tlmm 123 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts b/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts
index 71b2cc6c392fef9edd19477e4aab6e28699e1eb7..e278997c98e99b1791eb2e0a9dd25ec01b40563b 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts
@@ -39,7 +39,6 @@ switch-lid {

pmic-glink {
compatible = "qcom,x1e80100-pmic-glink",
- "qcom,sm8550-pmic-glink",
"qcom,pmic-glink";
orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
<&tlmm 123 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts b/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts
index 967f6dba0878b51a985fd7c9570b8c4e71afe57d..e6f1f72505a8dff5b1ffed5f93614973f649e275 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts
@@ -59,7 +59,6 @@ led-camera-indicator {

pmic-glink {
compatible = "qcom,x1e80100-pmic-glink",
- "qcom,sm8550-pmic-glink",
"qcom,pmic-glink";
orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
<&tlmm 123 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts b/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
index 10b3af5e79fb6493cd6b6c661de6a801e40092f7..8057a5dadabcbf16426ba0088a13eb9c35ffff61 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
@@ -83,7 +83,6 @@ switch-lid {

pmic-glink {
compatible = "qcom,x1e80100-pmic-glink",
- "qcom,sm8550-pmic-glink",
"qcom,pmic-glink";
orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
<&tlmm 123 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
index dad0f11e8e8583df6fd8aeec5be2af86739d85fb..aee38ead38a94ddca525b55004d8b8655e8484df 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
@@ -41,7 +41,6 @@ switch-lid {

pmic-glink {
compatible = "qcom,x1e80100-pmic-glink",
- "qcom,sm8550-pmic-glink",
"qcom,pmic-glink";
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi
index 0fd8516580b2679ee425438cb73fd4078cb20581..d2bce79c4a4146c57602cf48fbb42446004f48e2 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi
@@ -94,7 +94,6 @@ led-camera-indicator {

pmic-glink {
compatible = "qcom,x1e80100-pmic-glink",
- "qcom,sm8550-pmic-glink",
"qcom,pmic-glink";
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
index 4dfba835af6a064dbc5ad65671cb8a6e4df79758..2845a8929f80f9f9921568fb76cba79e60ebcd42 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
@@ -52,7 +52,6 @@ chosen {

pmic-glink {
compatible = "qcom,x1e80100-pmic-glink",
- "qcom,sm8550-pmic-glink",
"qcom,pmic-glink";
#address-cells = <1>;
#size-cells = <0>;

--
2.34.1

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From: Fenglin Wu via B4 Relay <devnull+fenglin.wu.oss.qualcomm.com@xxxxxxxxxx>
Date: Fri, 30 May 2025 15:35:10 +0800
Subject: [PATCH v2 5/8] power: supply: qcom_battmgr: Add charge control
support
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From: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>

Add charge control support for SM8550 and X1E80100. It's supported
with below two power supply properties:

charge_control_end_threshold: SOC threshold at which the charging
should be terminated.

charge_control_start_threshold: SOC threshold at which the charging
should be resumed.

Signed-off-by: Fenglin Wu <fenglin.wu@xxxxxxxxxxxxxxxx>
---
drivers/power/supply/qcom_battmgr.c | 256 ++++++++++++++++++++++++++++++++++--
1 file changed, 248 insertions(+), 8 deletions(-)

diff --git a/drivers/power/supply/qcom_battmgr.c b/drivers/power/supply/qcom_battmgr.c
index d5d0200b92bdc3d9a22f44159ad45b152efe8be0..39009415f4bfcd76b010305179d3c8fb847254a6 100644
--- a/drivers/power/supply/qcom_battmgr.c
+++ b/drivers/power/supply/qcom_battmgr.c
@@ -21,6 +21,8 @@
enum qcom_battmgr_variant {
QCOM_BATTMGR_SM8350,
QCOM_BATTMGR_SC8280XP,
+ QCOM_BATTMGR_X1E80100,
+ QCOM_BATTMGR_SM8550,
};

#define BATTMGR_BAT_STATUS 0x1
@@ -66,6 +68,9 @@ enum qcom_battmgr_variant {
#define BATT_RESISTANCE 21
#define BATT_POWER_NOW 22
#define BATT_POWER_AVG 23
+#define BATT_CHG_CTRL_EN 24
+#define BATT_CHG_CTRL_START_THR 25
+#define BATT_CHG_CTRL_END_THR 26

#define BATTMGR_USB_PROPERTY_GET 0x32
#define BATTMGR_USB_PROPERTY_SET 0x33
@@ -90,6 +95,13 @@ enum qcom_battmgr_variant {
#define WLS_TYPE 5
#define WLS_BOOST_EN 6

+#define BATTMGR_CHG_CTRL_LIMIT_EN 0x48
+#define CHARGE_CTRL_START_THR_MIN 50
+#define CHARGE_CTRL_START_THR_MAX 95
+#define CHARGE_CTRL_END_THR_MIN 55
+#define CHARGE_CTRL_END_THR_MAX 100
+#define CHARGE_CTRL_DELTA_SOC 5
+
struct qcom_battmgr_enable_request {
struct pmic_glink_hdr hdr;
__le32 battery_id;
@@ -124,6 +136,13 @@ struct qcom_battmgr_discharge_time_request {
__le32 reserved;
};

+struct qcom_battmgr_charge_ctrl_request {
+ struct pmic_glink_hdr hdr;
+ __le32 enable;
+ __le32 target_soc;
+ __le32 delta_soc;
+};
+
struct qcom_battmgr_message {
struct pmic_glink_hdr hdr;
union {
@@ -236,6 +255,8 @@ struct qcom_battmgr_info {
unsigned int capacity_warning;
unsigned int cycle_count;
unsigned int charge_count;
+ unsigned int charge_ctrl_start;
+ unsigned int charge_ctrl_end;
char model_number[BATTMGR_STRING_LEN];
char serial_number[BATTMGR_STRING_LEN];
char oem_info[BATTMGR_STRING_LEN];
@@ -424,6 +445,8 @@ static const u8 sm8350_bat_prop_map[] = {
[POWER_SUPPLY_PROP_RESISTANCE] = BATT_RESISTANCE,
[POWER_SUPPLY_PROP_STATE_OF_HEALTH] = BATT_SOH,
[POWER_SUPPLY_PROP_POWER_NOW] = BATT_POWER_NOW,
+ [POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD] = BATT_CHG_CTRL_START_THR,
+ [POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD] = BATT_CHG_CTRL_END_THR,
};

static int qcom_battmgr_bat_sm8350_update(struct qcom_battmgr *battmgr,
@@ -494,7 +517,8 @@ static int qcom_battmgr_bat_get_property(struct power_supply *psy,
if (!battmgr->service_up)
return -EAGAIN;

- if (battmgr->variant == QCOM_BATTMGR_SC8280XP)
+ if (battmgr->variant == QCOM_BATTMGR_SC8280XP ||
+ battmgr->variant == QCOM_BATTMGR_X1E80100)
ret = qcom_battmgr_bat_sc8280xp_update(battmgr, psp);
else
ret = qcom_battmgr_bat_sm8350_update(battmgr, psp);
@@ -599,6 +623,12 @@ static int qcom_battmgr_bat_get_property(struct power_supply *psy,
case POWER_SUPPLY_PROP_TIME_TO_FULL_AVG:
val->intval = battmgr->status.charge_time;
break;
+ case POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD:
+ val->intval = battmgr->info.charge_ctrl_start;
+ break;
+ case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD:
+ val->intval = battmgr->info.charge_ctrl_end;
+ break;
case POWER_SUPPLY_PROP_MANUFACTURE_YEAR:
val->intval = battmgr->info.year;
break;
@@ -624,6 +654,120 @@ static int qcom_battmgr_bat_get_property(struct power_supply *psy,
return 0;
}

+static int qcom_battmgr_set_charge_control(struct qcom_battmgr *battmgr,
+ u32 target_soc, u32 delta_soc)
+{
+ struct qcom_battmgr_charge_ctrl_request request = {
+ .hdr.owner = cpu_to_le32(PMIC_GLINK_OWNER_BATTMGR),
+ .hdr.type = cpu_to_le32(PMIC_GLINK_REQ_RESP),
+ .hdr.opcode = cpu_to_le32(BATTMGR_CHG_CTRL_LIMIT_EN),
+ .enable = cpu_to_le32(1),
+ .target_soc = cpu_to_le32(target_soc),
+ .delta_soc = cpu_to_le32(delta_soc),
+ };
+
+ return qcom_battmgr_request(battmgr, &request, sizeof(request));
+}
+
+static int qcom_battmgr_set_charge_start_threshold(struct qcom_battmgr *battmgr, int soc)
+{
+ u32 target_soc, delta_soc;
+ int ret;
+
+ if (soc < CHARGE_CTRL_START_THR_MIN ||
+ soc > CHARGE_CTRL_START_THR_MAX) {
+ dev_err(battmgr->dev, "charge control start threshold exceed range: [%u - %u]\n",
+ CHARGE_CTRL_START_THR_MIN, CHARGE_CTRL_START_THR_MAX);
+ return -EINVAL;
+ }
+
+ /*
+ * If the new start threshold is larger than the old end threshold,
+ * move the end threshold one step (DELTA_SOC) after the new start
+ * threshold.
+ */
+ if (soc > battmgr->info.charge_ctrl_end) {
+ target_soc = soc + CHARGE_CTRL_DELTA_SOC;
+ target_soc = min_t(u32, target_soc, CHARGE_CTRL_END_THR_MAX);
+ delta_soc = target_soc - soc;
+ delta_soc = min_t(u32, delta_soc, CHARGE_CTRL_DELTA_SOC);
+ } else {
+ target_soc = battmgr->info.charge_ctrl_end;
+ delta_soc = battmgr->info.charge_ctrl_end - soc;
+ }
+
+ mutex_lock(&battmgr->lock);
+ ret = qcom_battmgr_set_charge_control(battmgr, target_soc, delta_soc);
+ mutex_unlock(&battmgr->lock);
+ if (!ret) {
+ battmgr->info.charge_ctrl_start = soc;
+ battmgr->info.charge_ctrl_end = target_soc;
+ }
+
+ return 0;
+}
+
+static int qcom_battmgr_set_charge_end_threshold(struct qcom_battmgr *battmgr, int soc)
+{
+ u32 delta_soc = CHARGE_CTRL_DELTA_SOC;
+ int ret;
+
+ if (soc < CHARGE_CTRL_END_THR_MIN ||
+ soc > CHARGE_CTRL_END_THR_MAX) {
+ dev_err(battmgr->dev, "charge control end threshold exceed range: [%u - %u]\n",
+ CHARGE_CTRL_END_THR_MIN, CHARGE_CTRL_END_THR_MAX);
+ return -EINVAL;
+ }
+
+ if (battmgr->info.charge_ctrl_start && soc > battmgr->info.charge_ctrl_start)
+ delta_soc = soc - battmgr->info.charge_ctrl_start;
+
+ mutex_lock(&battmgr->lock);
+ ret = qcom_battmgr_set_charge_control(battmgr, soc, delta_soc);
+ mutex_unlock(&battmgr->lock);
+ if (!ret) {
+ battmgr->info.charge_ctrl_start = soc - delta_soc;
+ battmgr->info.charge_ctrl_end = soc;
+ }
+
+ return 0;
+}
+
+static int qcom_battmgr_bat_is_writeable(struct power_supply *psy,
+ enum power_supply_property psp)
+{
+ switch (psp) {
+ case POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD:
+ case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD:
+ return 1;
+ default:
+ return 0;
+ }
+
+ return 0;
+}
+
+static int qcom_battmgr_bat_set_property(struct power_supply *psy,
+ enum power_supply_property psp,
+ const union power_supply_propval *pval)
+{
+ struct qcom_battmgr *battmgr = power_supply_get_drvdata(psy);
+
+ if (!battmgr->service_up)
+ return -EAGAIN;
+
+ switch (psp) {
+ case POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD:
+ return qcom_battmgr_set_charge_start_threshold(battmgr, pval->intval);
+ case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD:
+ return qcom_battmgr_set_charge_end_threshold(battmgr, pval->intval);
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static const enum power_supply_property sc8280xp_bat_props[] = {
POWER_SUPPLY_PROP_STATUS,
POWER_SUPPLY_PROP_PRESENT,
@@ -657,6 +801,43 @@ static const struct power_supply_desc sc8280xp_bat_psy_desc = {
.get_property = qcom_battmgr_bat_get_property,
};

+static const enum power_supply_property x1e80100_bat_props[] = {
+ POWER_SUPPLY_PROP_STATUS,
+ POWER_SUPPLY_PROP_PRESENT,
+ POWER_SUPPLY_PROP_TECHNOLOGY,
+ POWER_SUPPLY_PROP_CYCLE_COUNT,
+ POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
+ POWER_SUPPLY_PROP_VOLTAGE_NOW,
+ POWER_SUPPLY_PROP_POWER_NOW,
+ POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
+ POWER_SUPPLY_PROP_CHARGE_FULL,
+ POWER_SUPPLY_PROP_CHARGE_EMPTY,
+ POWER_SUPPLY_PROP_CHARGE_NOW,
+ POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN,
+ POWER_SUPPLY_PROP_ENERGY_FULL,
+ POWER_SUPPLY_PROP_ENERGY_EMPTY,
+ POWER_SUPPLY_PROP_ENERGY_NOW,
+ POWER_SUPPLY_PROP_TEMP,
+ POWER_SUPPLY_PROP_MANUFACTURE_YEAR,
+ POWER_SUPPLY_PROP_MANUFACTURE_MONTH,
+ POWER_SUPPLY_PROP_MANUFACTURE_DAY,
+ POWER_SUPPLY_PROP_MODEL_NAME,
+ POWER_SUPPLY_PROP_MANUFACTURER,
+ POWER_SUPPLY_PROP_SERIAL_NUMBER,
+ POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD,
+ POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD,
+};
+
+static const struct power_supply_desc x1e80100_bat_psy_desc = {
+ .name = "qcom-battmgr-bat",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = x1e80100_bat_props,
+ .num_properties = ARRAY_SIZE(x1e80100_bat_props),
+ .get_property = qcom_battmgr_bat_get_property,
+ .set_property = qcom_battmgr_bat_set_property,
+ .property_is_writeable = qcom_battmgr_bat_is_writeable,
+};
+
static const enum power_supply_property sm8350_bat_props[] = {
POWER_SUPPLY_PROP_STATUS,
POWER_SUPPLY_PROP_HEALTH,
@@ -689,6 +870,42 @@ static const struct power_supply_desc sm8350_bat_psy_desc = {
.get_property = qcom_battmgr_bat_get_property,
};

+static const enum power_supply_property sm8550_bat_props[] = {
+ POWER_SUPPLY_PROP_STATUS,
+ POWER_SUPPLY_PROP_HEALTH,
+ POWER_SUPPLY_PROP_PRESENT,
+ POWER_SUPPLY_PROP_CHARGE_TYPE,
+ POWER_SUPPLY_PROP_CAPACITY,
+ POWER_SUPPLY_PROP_VOLTAGE_OCV,
+ POWER_SUPPLY_PROP_VOLTAGE_NOW,
+ POWER_SUPPLY_PROP_VOLTAGE_MAX,
+ POWER_SUPPLY_PROP_CURRENT_NOW,
+ POWER_SUPPLY_PROP_TEMP,
+ POWER_SUPPLY_PROP_TECHNOLOGY,
+ POWER_SUPPLY_PROP_CHARGE_COUNTER,
+ POWER_SUPPLY_PROP_CYCLE_COUNT,
+ POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
+ POWER_SUPPLY_PROP_CHARGE_FULL,
+ POWER_SUPPLY_PROP_MODEL_NAME,
+ POWER_SUPPLY_PROP_TIME_TO_FULL_AVG,
+ POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
+ POWER_SUPPLY_PROP_RESISTANCE,
+ POWER_SUPPLY_PROP_STATE_OF_HEALTH,
+ POWER_SUPPLY_PROP_POWER_NOW,
+ POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD,
+ POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD,
+};
+
+static const struct power_supply_desc sm8550_bat_psy_desc = {
+ .name = "qcom-battmgr-bat",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = sm8550_bat_props,
+ .num_properties = ARRAY_SIZE(sm8550_bat_props),
+ .get_property = qcom_battmgr_bat_get_property,
+ .set_property = qcom_battmgr_bat_set_property,
+ .property_is_writeable = qcom_battmgr_bat_is_writeable,
+};
+
static int qcom_battmgr_ac_get_property(struct power_supply *psy,
enum power_supply_property psp,
union power_supply_propval *val)
@@ -764,7 +981,8 @@ static int qcom_battmgr_usb_get_property(struct power_supply *psy,
if (!battmgr->service_up)
return -EAGAIN;

- if (battmgr->variant == QCOM_BATTMGR_SC8280XP)
+ if (battmgr->variant == QCOM_BATTMGR_SC8280XP ||
+ battmgr->variant == QCOM_BATTMGR_X1E80100)
ret = qcom_battmgr_bat_sc8280xp_update(battmgr, psp);
else
ret = qcom_battmgr_usb_sm8350_update(battmgr, psp);
@@ -886,7 +1104,8 @@ static int qcom_battmgr_wls_get_property(struct power_supply *psy,
if (!battmgr->service_up)
return -EAGAIN;

- if (battmgr->variant == QCOM_BATTMGR_SC8280XP)
+ if (battmgr->variant == QCOM_BATTMGR_SC8280XP ||
+ battmgr->variant == QCOM_BATTMGR_X1E80100)
ret = qcom_battmgr_bat_sc8280xp_update(battmgr, psp);
else
ret = qcom_battmgr_wls_sm8350_update(battmgr, psp);
@@ -1196,6 +1415,12 @@ static void qcom_battmgr_sm8350_callback(struct qcom_battmgr *battmgr,
case BATT_POWER_NOW:
battmgr->status.power_now = le32_to_cpu(resp->intval.value);
break;
+ case BATT_CHG_CTRL_START_THR:
+ battmgr->info.charge_ctrl_start = le32_to_cpu(resp->intval.value);
+ break;
+ case BATT_CHG_CTRL_END_THR:
+ battmgr->info.charge_ctrl_end = le32_to_cpu(resp->intval.value);
+ break;
default:
dev_warn(battmgr->dev, "unknown property %#x\n", property);
break;
@@ -1278,6 +1503,7 @@ static void qcom_battmgr_sm8350_callback(struct qcom_battmgr *battmgr,
}
break;
case BATTMGR_REQUEST_NOTIFICATION:
+ case BATTMGR_CHG_CTRL_LIMIT_EN:
battmgr->error = 0;
break;
default:
@@ -1297,7 +1523,8 @@ static void qcom_battmgr_callback(const void *data, size_t len, void *priv)

if (opcode == BATTMGR_NOTIFICATION)
qcom_battmgr_notification(battmgr, data, len);
- else if (battmgr->variant == QCOM_BATTMGR_SC8280XP)
+ else if (battmgr->variant == QCOM_BATTMGR_SC8280XP ||
+ battmgr->variant == QCOM_BATTMGR_X1E80100)
qcom_battmgr_sc8280xp_callback(battmgr, data, len);
else
qcom_battmgr_sm8350_callback(battmgr, data, len);
@@ -1333,7 +1560,8 @@ static void qcom_battmgr_pdr_notify(void *priv, int state)
static const struct of_device_id qcom_battmgr_of_variants[] = {
{ .compatible = "qcom,sc8180x-pmic-glink", .data = (void *)QCOM_BATTMGR_SC8280XP },
{ .compatible = "qcom,sc8280xp-pmic-glink", .data = (void *)QCOM_BATTMGR_SC8280XP },
- { .compatible = "qcom,x1e80100-pmic-glink", .data = (void *)QCOM_BATTMGR_SC8280XP },
+ { .compatible = "qcom,x1e80100-pmic-glink", .data = (void *)QCOM_BATTMGR_X1E80100 },
+ { .compatible = "qcom,sm8550-pmic-glink", .data = (void *)QCOM_BATTMGR_SM8550 },
/* Unmatched devices falls back to QCOM_BATTMGR_SM8350 */
{}
};
@@ -1343,6 +1571,7 @@ static char *qcom_battmgr_battery[] = { "battery" };
static int qcom_battmgr_probe(struct auxiliary_device *adev,
const struct auxiliary_device_id *id)
{
+ const struct power_supply_desc *psy_desc;
struct power_supply_config psy_cfg_supply = {};
struct power_supply_config psy_cfg = {};
const struct of_device_id *match;
@@ -1373,8 +1602,14 @@ static int qcom_battmgr_probe(struct auxiliary_device *adev,
else
battmgr->variant = QCOM_BATTMGR_SM8350;

- if (battmgr->variant == QCOM_BATTMGR_SC8280XP) {
- battmgr->bat_psy = devm_power_supply_register(dev, &sc8280xp_bat_psy_desc, &psy_cfg);
+ if (battmgr->variant == QCOM_BATTMGR_SC8280XP ||
+ battmgr->variant == QCOM_BATTMGR_X1E80100) {
+ if (battmgr->variant == QCOM_BATTMGR_X1E80100)
+ psy_desc = &x1e80100_bat_psy_desc;
+ else
+ psy_desc = &sc8280xp_bat_psy_desc;
+
+ battmgr->bat_psy = devm_power_supply_register(dev, psy_desc, &psy_cfg);
if (IS_ERR(battmgr->bat_psy))
return dev_err_probe(dev, PTR_ERR(battmgr->bat_psy),
"failed to register battery power supply\n");
@@ -1394,7 +1629,12 @@ static int qcom_battmgr_probe(struct auxiliary_device *adev,
return dev_err_probe(dev, PTR_ERR(battmgr->wls_psy),
"failed to register wireless charing power supply\n");
} else {
- battmgr->bat_psy = devm_power_supply_register(dev, &sm8350_bat_psy_desc, &psy_cfg);
+ if (battmgr->variant == QCOM_BATTMGR_SM8550)
+ psy_desc = &sm8550_bat_psy_desc;
+ else
+ psy_desc = &sm8350_bat_psy_desc;
+
+ battmgr->bat_psy = devm_power_supply_register(dev, psy_desc, &psy_cfg);
if (IS_ERR(battmgr->bat_psy))
return dev_err_probe(dev, PTR_ERR(battmgr->bat_psy),
"failed to register battery power supply\n");

--
2.34.1

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Hi Prateek,

On 5/30/2025 2:09 PM, K Prateek Nayak wrote:
> Hello Jianyong,
>
> On 5/29/2025 4:02 PM, Jianyong Wu wrote:
>>
>> This will happen even when 2 task are located in a cpuset of 16 cpus
>> that shares an LLC. I don't think that it's overloaded for this case.
>
> But if they are located on 2 different CPUs, sched_balance_find_src_rq()
> should not return any CPU right? Probably just a timing thing with some
> system noise that causes the CPU running the server / client to be
> temporarily overloaded.
>

I think it will.
Suppose this scenario. There are 2 LLCs each associated with 4 cpus,
under a single NUMA node. Sometimes, one LLC has 4 tasks, each running
on a separate cpu, while the other LLC has no task running. Should the
load balancer take action to balance the workload? Absolutely yes.

The tricky point is that the balance action will fail during the first
few attempts. In the meanwhile, sd->nr_balance_failed increments until
it exceeds the threshold sd->cache_nice_tries + 2. At that point, active
balancing is triggered. Eventually, the migration thread steps in to
migrate the task. That's exactly what I've observed.

>>
>> Â Â I've only seen
>>> this happen when a noise like kworker comes in. What exactly is
>>> causing these migrations in your case and is it actually that bad
>>> for iperf?
>>
>> I think it's the nohz idle balance that pulls these 2 iperf apart. But
>> the root cause is that load balance doesn't permit even a slight
>> imbalance among LLCs.
>>
>> Exactly. It's easy to reproduce in those multi-LLCs NUMA system like
>> some AMD servers.
>>
>>>
>>>>
>>>> Our solution: Permit controlled load imbalance between LLCs on the same
>>>> NUMA node, prioritizing communication affinity over strict balance.
>>>>
>>>> Impact: In a virtual machine with one socket, multiple NUMA nodes (each
>>>> with 4 LLCs), unpatched systems suffered 3,000+ LLC migrations in 200
>>>> seconds as tasks cycled through all four LLCs. With the patch,
>>>> migrations
>>>> stabilize at â?¤10 instances, largely suppressing the NUMA-local LLC
>>>> thrashing.
>>>
>>> Is there any improvement in iperf numbers with these changes?
>>>
>> I observe a bit of improvement with this patch in my test.
>
> I'll also give this series a spin on my end to see if it helps.
>
Great! Let me know how it goes on your end.

>>
>>>>
>>>> Signed-off-by: Jianyong Wu <wujianyong@xxxxxxxx>
>>>> ---
>>>> Â kernel/sched/fair.c | 16 ++++++++++++++++
>>>> Â 1 file changed, 16 insertions(+)
>>>>
>>>> diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
>>>> index 0fb9bf995a47..749210e6316b 100644
>>>> --- a/kernel/sched/fair.c
>>>> +++ b/kernel/sched/fair.c
>>>> @@ -11203,6 +11203,22 @@ static inline void
>>>> calculate_imbalance(struct lb_env *env, struct sd_lb_stats *s
>>>> Â Â Â Â Â Â Â Â Â }
>>>> Â #endif
>>>> +Â Â Â Â Â Â Â /* Allow imbalance between LLCs within a single NUMA node */
>>>> +Â Â Â Â Â Â Â if (env->sd->child && env->sd->child->flags & SD_SHARE_LLC
>>>> && env->sd->parent
>>>> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â && env->sd->parent->flags & SD_NUMA) {
>>>
>>> This does not imply multiple LLC in package. SD_SHARE_LLC is
>>> SDF_SHARED_CHILD and will be set from SMT domain onwards. This condition
>>> will be true on Intel with SNC enabled despite not having multiple LLC
>>> and llc_nr will be number of cores there.
>>>
>>> Perhaps multiple LLCs can be detected using:
>>>
>>> Â Â Â Â !((sd->child->flags ^ sd->flags) & SD_SHARE_LLC)
>
> This should have been just
>
> Â Â Â (sd->child->flags ^ sd->flags) & SD_SHARE_LLC
>
> to find the LLC boundary. Not sure why I prefixed that "!". You also
> have to ensure sd itself is not a NUMA domain which is possible with L3
> as NUMA option EPYC platforms and Intel with SNC.
>
Thanks again, I made a mistake too.

Thanks
Jianyong
>>
>> Great! Thanks!>
>>>> +Â Â Â Â Â Â Â Â Â Â Â int child_weight = env->sd->child->span_weight;
>>>> +Â Â Â Â Â Â Â Â Â Â Â int llc_nr = env->sd->span_weight / child_weight;
>>>> +Â Â Â Â Â Â Â Â Â Â Â int imb_nr, min;
>>>> +
>>>> +Â Â Â Â Â Â Â Â Â Â Â if (llc_nr > 1) {
>>>> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â /* Let the imbalance not be greater than half of
>>>> child_weight */
>>>> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â min = child_weight >= 4 ? 2 : 1;
>>>> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â imb_nr = max_t(int, min, child_weight >> 2);
>>>
>>> Isn't this just max_t(int, child_weight >> 2, 1)?
>>
>> I expect that imb_nr can be 2 when child_weight is 4, as I observe
>> that the cpu number of LLC starts from 4 in the multi-LLCs NUMA system.
>> However, this may cause the LLCs a bit overload. I'm not sure if it's
>> a good idea.
>
> My bad. I interpreted ">> 2" as "/ 2" here. Couple of brain stopped
> working moments.
>

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Subject: [syzbot] [kernel?] INFO: rcu detected stall in vm_area_alloc (6)
From: syzbot <syzbot+2ddfdc64a6b68a324ae2@xxxxxxxxxxxxxxxxxxxxxxxxx>
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Hello,

syzbot found the following issue on:

HEAD commit: 0f8c0258bf04 Merge tag 'mm-hotfixes-stable-2025-05-25-00-5..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=12e45170580000
kernel config: https://syzkaller.appspot.com/x/.config?x=9b0280e4afd1c529
dashboard link: https://syzkaller.appspot.com/bug?extid=2ddfdc64a6b68a324ae2
compiler: gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40
syz repro: https://syzkaller.appspot.com/x/repro.syz?x=16e45170580000

Downloadable assets:
disk image: https://storage.googleapis.com/syzbot-assets/77489c857e31/disk-0f8c0258.raw.xz
vmlinux: https://storage.googleapis.com/syzbot-assets/3adcdd5d62b9/vmlinux-0f8c0258.xz
kernel image: https://storage.googleapis.com/syzbot-assets/c93fd6a6b796/bzImage-0f8c0258.xz

IMPORTANT: if you fix the issue, please add the following tag to the commit:
Reported-by: syzbot+2ddfdc64a6b68a324ae2@xxxxxxxxxxxxxxxxxxxxxxxxx

rcu: INFO: rcu_preempt detected stalls on CPUs/tasks:
rcu: 0-...!: (1 GPs behind) idle=51a4/1/0x4000000000000000 softirq=18198/18202 fqs=0
rcu: (detected by 1, t=10502 jiffies, g=9149, q=175 ncpus=2)
Sending NMI from CPU 1 to CPUs 0:
NMI backtrace for cpu 0
CPU: 0 UID: 0 PID: 6052 Comm: modprobe Not tainted 6.15.0-rc7-syzkaller-00175-g0f8c0258bf04 #0 PREEMPT(full)
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 05/07/2025
RIP: 0010:pv_queued_spin_unlock arch/x86/include/asm/paravirt.h:577 [inline]
RIP: 0010:queued_spin_unlock arch/x86/include/asm/qspinlock.h:57 [inline]
RIP: 0010:do_raw_spin_unlock+0x152/0x230 kernel/locking/spinlock_debug.c:142
Code: 83 e0 07 83 c0 03 38 d0 7c 08 84 d2 0f 85 95 00 00 00 48 c7 c0 50 20 22 8e c7 43 08 ff ff ff ff 48 ba 00 00 00 00 00 fc ff df <48> c1 e8 03 80 3c 10 00 0f 85 ba 00 00 00 48 83 3d 78 ab 89 0c 00
RSP: 0018:ffffc90000007d18 EFLAGS: 00000046
RAX: ffffffff8e222050 RBX: ffffffff9adbe550 RCX: ffffffff819873c3
RDX: dffffc0000000000 RSI: 0000000000000004 RDI: ffffffff9adbe550
RBP: ffffffff9adbe558 R08: 0000000000000000 R09: fffffbfff35b7caa
R10: ffffffff9adbe553 R11: 0000000000000000 R12: ffffffff9adbe560
R13: dffffc0000000000 R14: ffff88802ae6b340 R15: 1ffff92000000fac
FS: 0000000000000000(0000) GS:ffff8881249da000(0000) knlGS:0000000000000000
CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 00007ffe27243ff8 CR3: 000000005cd34000 CR4: 00000000003526f0
DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
Call Trace:
<IRQ>
__raw_spin_unlock_irqrestore include/linux/spinlock_api_smp.h:150 [inline]
_raw_spin_unlock_irqrestore+0x22/0x80 kernel/locking/spinlock.c:194
debug_object_deactivate+0x1ec/0x3a0 lib/debugobjects.c:888
debug_hrtimer_deactivate kernel/time/hrtimer.c:450 [inline]
debug_deactivate kernel/time/hrtimer.c:490 [inline]
__run_hrtimer kernel/time/hrtimer.c:1729 [inline]
__hrtimer_run_queues+0x46f/0xad0 kernel/time/hrtimer.c:1825
hrtimer_interrupt+0x397/0x8e0 kernel/time/hrtimer.c:1887
local_apic_timer_interrupt arch/x86/kernel/apic/apic.c:1038 [inline]
__sysvec_apic_timer_interrupt+0x108/0x3f0 arch/x86/kernel/apic/apic.c:1055
instr_sysvec_apic_timer_interrupt arch/x86/kernel/apic/apic.c:1049 [inline]
sysvec_apic_timer_interrupt+0x9f/0xc0 arch/x86/kernel/apic/apic.c:1049
</IRQ>
<TASK>
asm_sysvec_apic_timer_interrupt+0x1a/0x20 arch/x86/include/asm/idtentry.h:702
RIP: 0010:lock_acquire+0x62/0x350 kernel/locking/lockdep.c:5870
Code: 39 0c 12 83 f8 07 0f 87 bc 02 00 00 89 c0 48 0f a3 05 52 0a ed 0e 0f 82 74 02 00 00 8b 35 ea 39 ed 0e 85 f6 0f 85 8d 00 00 00 <48> 8b 44 24 30 65 48 2b 05 29 39 0c 12 0f 85 c7 02 00 00 48 83 c4
RSP: 0018:ffffc90003fdf3c0 EFLAGS: 00000206
RAX: 0000000000000046 RBX: ffffffff8e3bfc00 RCX: 00000000ad97940f
RDX: 0000000000000000 RSI: ffffffff8dbbf273 RDI: ffffffff8bf4a520
RBP: 0000000000000002 R08: 461794d577a429a7 R09: 0000000000000000
R10: 0000000000000001 R11: 0000000000000000 R12: 0000000000000000
R13: 0000000000000000 R14: 0000000000000000 R15: 0000000000000000
rcu_lock_acquire include/linux/rcupdate.h:331 [inline]
rcu_read_lock include/linux/rcupdate.h:841 [inline]
class_rcu_constructor include/linux/rcupdate.h:1155 [inline]
unwind_next_frame+0xd1/0x20a0 arch/x86/kernel/unwind_orc.c:479
arch_stack_walk+0x94/0x100 arch/x86/kernel/stacktrace.c:25
stack_trace_save+0x8e/0xc0 kernel/stacktrace.c:122
kasan_save_stack+0x33/0x60 mm/kasan/common.c:47
kasan_save_track+0x14/0x30 mm/kasan/common.c:68
unpoison_slab_object mm/kasan/common.c:319 [inline]
__kasan_slab_alloc+0x89/0x90 mm/kasan/common.c:345
kasan_slab_alloc include/linux/kasan.h:250 [inline]
slab_post_alloc_hook mm/slub.c:4147 [inline]
slab_alloc_node mm/slub.c:4196 [inline]
kmem_cache_alloc_noprof+0x1cb/0x3b0 mm/slub.c:4203
vm_area_alloc+0x1f/0x160 kernel/fork.c:441
__mmap_new_vma mm/vma.c:2403 [inline]
__mmap_region+0xfd0/0x27c0 mm/vma.c:2520
mmap_region+0x1ab/0x3f0 mm/vma.c:2598
do_mmap+0xd8e/0x11b0 mm/mmap.c:561
vm_mmap_pgoff+0x281/0x450 mm/util.c:579
ksys_mmap_pgoff+0x32c/0x5c0 mm/mmap.c:607
__do_sys_mmap arch/x86/kernel/sys_x86_64.c:89 [inline]
__se_sys_mmap arch/x86/kernel/sys_x86_64.c:82 [inline]
__x64_sys_mmap+0x125/0x190 arch/x86/kernel/sys_x86_64.c:82
do_syscall_x64 arch/x86/entry/syscall_64.c:63 [inline]
do_syscall_64+0xcd/0x260 arch/x86/entry/syscall_64.c:94
entry_SYSCALL_64_after_hwframe+0x77/0x7f
RIP: 0033:0x7fa439aa5242
Code: 08 00 04 00 00 eb e2 90 41 f7 c1 ff 0f 00 00 75 27 55 89 cd 53 48 89 fb 48 85 ff 74 33 41 89 ea 48 89 df b8 09 00 00 00 0f 05 <48> 3d 00 f0 ff ff 77 5e 5b 5d c3 0f 1f 00 c7 05 46 40 01 00 16 00
RSP: 002b:00007ffe27243898 EFLAGS: 00000246 ORIG_RAX: 0000000000000009
RAX: ffffffffffffffda RBX: 0000000000000000 RCX: 00007fa439aa5242
RDX: 0000000000000001 RSI: 00000000000c1918 RDI: 0000000000000000
RBP: 0000000000000802 R08: 0000000000000000 R09: 0000000000000000
R10: 0000000000000802 R11: 0000000000000246 R12: 0000000000000000
R13: 00007fa439a790c0 R14: 00007ffe27243ca0 R15: 00000fffc4e48716
</TASK>
rcu: rcu_preempt kthread starved for 10502 jiffies! g9149 f0x0 RCU_GP_WAIT_FQS(5) ->state=0x0 ->cpu=1
rcu: Unless rcu_preempt kthread gets sufficient CPU time, OOM is now expected behavior.
rcu: RCU grace-period kthread stack dump:
task:rcu_preempt state:R running task stack:28664 pid:16 tgid:16 ppid:2 task_flags:0x208040 flags:0x00004000
Call Trace:
<TASK>
context_switch kernel/sched/core.c:5382 [inline]
__schedule+0x116f/0x5de0 kernel/sched/core.c:6767
__schedule_loop kernel/sched/core.c:6845 [inline]
schedule+0xe7/0x3a0 kernel/sched/core.c:6860
schedule_timeout+0x123/0x290 kernel/time/sleep_timeout.c:99
rcu_gp_fqs_loop+0x1ea/0xb00 kernel/rcu/tree.c:2046
rcu_gp_kthread+0x270/0x380 kernel/rcu/tree.c:2248
kthread+0x3c2/0x780 kernel/kthread.c:464
ret_from_fork+0x45/0x80 arch/x86/kernel/process.c:153
ret_from_fork_asm+0x1a/0x30 arch/x86/entry/entry_64.S:245
</TASK>
rcu: Stack dump where RCU GP kthread last ran:
CPU: 1 UID: 0 PID: 65 Comm: kworker/u8:4 Not tainted 6.15.0-rc7-syzkaller-00175-g0f8c0258bf04 #0 PREEMPT(full)
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 05/07/2025
Workqueue: events_unbound toggle_allocation_gate
RIP: 0010:csd_lock_wait kernel/smp.c:340 [inline]
RIP: 0010:smp_call_function_many_cond+0x4a5/0x1290 kernel/smp.c:885
Code: 89 ee e8 de 12 0c 00 85 ed 74 48 48 8b 44 24 20 49 89 c4 83 e0 07 49 c1 ec 03 48 89 c5 4d 01 f4 83 c5 03 e8 7d 17 0c 00 f3 90 <41> 0f b6 04 24 40 38 c5 7c 08 84 c0 0f 85 de 0b 00 00 8b 43 08 31
RSP: 0018:ffffc90001567938 EFLAGS: 00000293
RAX: 0000000000000000 RBX: ffff8880b8441720 RCX: ffffffff81af2e99
RDX: ffff88801db90000 RSI: ffffffff81af2e73 RDI: 0000000000000005
RBP: 0000000000000003 R08: 0000000000000005 R09: 0000000000000000
R10: 0000000000000001 R11: 0000000000000000 R12: ffffed10170882e5
R13: 0000000000000001 R14: dffffc0000000000 R15: ffff8880b853b040
FS: 0000000000000000(0000) GS:ffff888124ada000(0000) knlGS:0000000000000000
CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 00007f5422dddd58 CR3: 000000000e180000 CR4: 00000000003526f0
DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
Call Trace:
<TASK>
on_each_cpu_cond_mask+0x40/0x90 kernel/smp.c:1052
on_each_cpu include/linux/smp.h:71 [inline]
text_poke_sync arch/x86/kernel/alternative.c:2757 [inline]
text_poke_bp_batch+0x566/0x760 arch/x86/kernel/alternative.c:3050
text_poke_flush arch/x86/kernel/alternative.c:3158 [inline]
text_poke_flush arch/x86/kernel/alternative.c:3155 [inline]
text_poke_finish+0x30/0x40 arch/x86/kernel/alternative.c:3165
arch_jump_label_transform_apply+0x1c/0x30 arch/x86/kernel/jump_label.c:146
jump_label_update+0x376/0x550 kernel/jump_label.c:919
static_key_enable_cpuslocked+0x1b7/0x270 kernel/jump_label.c:210
static_key_enable+0x1a/0x20 kernel/jump_label.c:223
toggle_allocation_gate mm/kfence/core.c:850 [inline]
toggle_allocation_gate+0xfa/0x280 mm/kfence/core.c:842
process_one_work+0x9cf/0x1b70 kernel/workqueue.c:3238
process_scheduled_works kernel/workqueue.c:3319 [inline]
worker_thread+0x6c8/0xf10 kernel/workqueue.c:3400
kthread+0x3c2/0x780 kernel/kthread.c:464
ret_from_fork+0x45/0x80 arch/x86/kernel/process.c:153
ret_from_fork_asm+0x1a/0x30 arch/x86/entry/entry_64.S:245
</TASK>

---
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Date: Fri, 30 May 2025 09:36:57 +0200
From: Angelo Dureghello <adureghello@xxxxxxxxxxxx>
To: Andy Shevchenko <andy@xxxxxxxxxx>, Jonathan Cameron <jic23@xxxxxxxxxx>
Cc: Jonathan Cameron <jic23@xxxxxxxxxx>,
David Lechner <dlechner@xxxxxxxxxxxx>, Nuno =?utf-8?B?U8Oh?= <nuno.sa@xxxxxxxxxx>,
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Subject: Re: [PATCH v7 1/6] Documentation: ABI: IIO: add calibconv_delay
documentation
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Hi Jonathan,

If all the rest is ok and there is no need for v8, could you maybe adjust
to 6.17 on acceptance ?

Thanks a lot,
regards
angelo

On 28.05.2025 13:32, Andy Shevchenko wrote:
> On Mon, May 26, 2025 at 12:03:16PM +0200, Angelo Dureghello wrote:
> >
> > Add new IIO "convdelay" documentation.
> >
> > The ad7606 implements a phase calibation feature, in nanoseconds.
> > Being this a time delay, using the convdelay suffix.
>
> ...
>
> > +KernelVersion: 6.16
>
> You need to bump to 6.17 if it's not a fix.
>
> ...
>
> > +KernelVersion: 6.16
>
> Ditto.
>
>
> --
> With Best Regards,
> Andy Shevchenko
>
>

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Date: Fri, 30 May 2025 09:39:10 +0200
From: Angelo Dureghello <adureghello@xxxxxxxxxxxx>
To: David Lechner <dlechner@xxxxxxxxxxxx>
Cc: Lars-Peter Clausen <lars@xxxxxxxxxx>,
Michael Hennerich <Michael.Hennerich@xxxxxxxxxx>, Jonathan Cameron <jic23@xxxxxxxxxx>,
Nuno =?utf-8?B?U8Oh?= <nuno.sa@xxxxxxxxxx>, Andy Shevchenko <andy@xxxxxxxxxx>, linux-iio@xxxxxxxxxxxxxxx,
linux-kernel@xxxxxxxxxxxxxxx
Subject: Re: [PATCH 2/2] iio: adc: ad7606: add enabling of optional Vrefin
voltage
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References: <20250529-wip-bl-ad7606-reference-voltages-v1-0-9b8f16ef0f20@xxxxxxxxxxxx>
<20250529-wip-bl-ad7606-reference-voltages-v1-2-9b8f16ef0f20@xxxxxxxxxxxx>
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On 29.05.2025 12:52, David Lechner wrote:
> On 5/29/25 4:13 AM, Angelo Dureghello wrote:
> > From: Angelo Dureghello <adureghello@xxxxxxxxxxxx>
> >
> > Add optional refin voltage enabling. The property "refin-supply" is
> > already available and optional in the current fdt dt_schema.
> >
> > Signed-off-by: Angelo Dureghello <adureghello@xxxxxxxxxxxx>
> > ---
> > drivers/iio/adc/ad7606.c | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c
> > index 3bbe9c05b5edbc11e8016c995c6ab64104836e7b..21e63260965c32988d0ab3b8bb1201aa2396f1ba 100644
> > --- a/drivers/iio/adc/ad7606.c
> > +++ b/drivers/iio/adc/ad7606.c
> > @@ -1335,6 +1335,10 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
> > return dev_err_probe(dev, ret,
> > "Failed to enable Vdrive supply\n");
> >
> > + ret = devm_regulator_get_enable_optional(dev, "refin");
> > + if (ret < 0 && ret != -ENODEV)
>
> < 0 is probably not needed.
>
The above code looks correct to me. What is the issue ?

> > + return dev_err_probe(dev, ret, "failed to get refin voltage\n");
>
> We aren't reading the voltage, so the message doesn't make sense.
>
Is it better a
"failed to get refin-supply\n" or
"failed to enable refin voltage\n"

?

> > +
> > st->chip_info = chip_info;
> >
> > if (st->chip_info->oversampling_num) {
> >
>
Regards,
angelo

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Date: Fri, 30 May 2025 10:41:15 +0300 (EEST)
To: "Nirujogi, Pratap" <pnirujog@xxxxxxx>, Hans de Goede <hansg@xxxxxxxxxx>
cc: Randy Dunlap <rdunlap@xxxxxxxxxxxxx>,
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Subject: Re: linux-next: Tree for May 27
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On Tue, 27 May 2025, Nirujogi, Pratap wrote:
> On 5/27/2025 3:43 PM, Hans de Goede wrote:
> > Caution: This message originated from an External Source. Use proper caution
> > when opening attachments, clicking links, or responding.
> >
> >
> > Hi,
> >
> > On 27-May-25 8:56 PM, Randy Dunlap wrote:
> > >
> > >
> > > On 5/27/25 3:32 AM, Stephen Rothwell wrote:
> > > > Hi all,
> > > >
> > > > Changes since 20250526:
> > > >
> > >
> > > on x86_64, when
> > > # CONFIG_MODULES is not set
> > >
> > > ../drivers/platform/x86/amd/amd_isp4.c: In function 'is_isp_i2c_adapter':
> > > ../drivers/platform/x86/amd/amd_isp4.c:154:35: error: invalid use of
> > > undefined type 'struct module'
> > > 154 | return !strcmp(adap->owner->name,
> > > "i2c_designware_amdisp");
> > > | ^~
> >
> > Hmm, this should not check the owner->name at all.
> >
> > Instead the i2c_designware_amdisp should set adap->name to something
> > unique and then this should check adap->name.
> >
> I noticed the unique name set to "adap->name" in i2c_designware_amdisp is
> getting overwritten to the generic "Synopsys DesignWare I2C adapter" name in
> i2c_dw_probe_master().
>
> https://github.com/torvalds/linux/blob/master/drivers/i2c/busses/i2c-designware-master.c#L1046
>
> Inorder to use unique name to detect the specific adapter without making
> changes in i2c-designware-master.c, I used adap->owner->name.
>
> Since it is causing build issues when CONFIG_MODULES is not set, can I make a
> change in i2c-designware-master.c to initialize the generic "Synopsys
> DesignWare I2C adapter" name only when adap->name is NULL. This way I should
> be able to pass the unique name from i2c_designware_amdisp module.

How can you check that, it's char name[48]; not a pointer???

> Please suggest if this approach is okay?

--
i.

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Date: Fri, 30 May 2025 09:44:21 +0200
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Subject: Re: linux-next: Tree for May 27 (drivers/platform/x86/amd/amd_isp4.c)
To: =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= <ilpo.jarvinen@xxxxxxxxxxxxxxx>,
"Nirujogi, Pratap" <pnirujog@xxxxxxx>
Cc: Randy Dunlap <rdunlap@xxxxxxxxxxxxx>,
Stephen Rothwell <sfr@xxxxxxxxxxxxxxxx>,
Linux Next Mailing List <linux-next@xxxxxxxxxxxxxxx>,
Pratap Nirujogi <pratap.nirujogi@xxxxxxx>,
Benjamin Chan <benjamin.chan@xxxxxxx>,
Linux Kernel Mailing List <linux-kernel@xxxxxxxxxxxxxxx>,
"open list:AMD HETERO CORE HARDWARE FEEDBACK DRIVER"
<platform-driver-x86@xxxxxxxxxxxxxxx>
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From: Hans de Goede <hansg@xxxxxxxxxx>
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Hi,

On 30-May-25 9:41 AM, Ilpo JÃ¤rvinen wrote:
> On Tue, 27 May 2025, Nirujogi, Pratap wrote:
>> On 5/27/2025 3:43 PM, Hans de Goede wrote:
>>> Caution: This message originated from an External Source. Use proper caution
>>> when opening attachments, clicking links, or responding.
>>>
>>>
>>> Hi,
>>>
>>> On 27-May-25 8:56 PM, Randy Dunlap wrote:
>>>>
>>>>
>>>> On 5/27/25 3:32 AM, Stephen Rothwell wrote:
>>>>> Hi all,
>>>>>
>>>>> Changes since 20250526:
>>>>>
>>>>
>>>> on x86_64, when
>>>> # CONFIG_MODULES is not set
>>>>
>>>> ../drivers/platform/x86/amd/amd_isp4.c: In function 'is_isp_i2c_adapter':
>>>> ../drivers/platform/x86/amd/amd_isp4.c:154:35: error: invalid use of
>>>> undefined type 'struct module'
>>>> 154 | return !strcmp(adap->owner->name,
>>>> "i2c_designware_amdisp");
>>>> | ^~
>>>
>>> Hmm, this should not check the owner->name at all.
>>>
>>> Instead the i2c_designware_amdisp should set adap->name to something
>>> unique and then this should check adap->name.
>>>
>> I noticed the unique name set to "adap->name" in i2c_designware_amdisp is
>> getting overwritten to the generic "Synopsys DesignWare I2C adapter" name in
>> i2c_dw_probe_master().
>>
>> https://github.com/torvalds/linux/blob/master/drivers/i2c/busses/i2c-designware-master.c#L1046
>>
>> Inorder to use unique name to detect the specific adapter without making
>> changes in i2c-designware-master.c, I used adap->owner->name.
>>
>> Since it is causing build issues when CONFIG_MODULES is not set, can I make a
>> change in i2c-designware-master.c to initialize the generic "Synopsys
>> DesignWare I2C adapter" name only when adap->name is NULL. This way I should
>> be able to pass the unique name from i2c_designware_amdisp module.
>
> How can you check that, it's char name[48]; not a pointer???

A NULL check indeed will not work, but we can check that (name[0] != 0).

Regards,

Hans

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From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
To: Mike Rapoport <rppt@xxxxxxxxxx>
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Subject: Re: [PATCH 1/3] x86/execmem: don't use PAGE_KERNEL protection for
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On Wed, May 28, 2025 at 08:27:19PM +0300, Mike Rapoport wrote:
> On Wed, May 28, 2025 at 02:35:55PM +0200, Juergen Gross wrote:
> > In case X86_FEATURE_PSE isn't available (e.g. when running as a Xen
> > PV guest), execmem_arch_setup() will fall back to use PAGE_KERNEL
> > protection for the EXECMEM_MODULE_TEXT range.
> >
> > This will result in attempts to execute code with the NX bit set in
> > case of ITS mitigation being applied.
> >
> > Avoid this problem by using PAGE_KERNEL_EXEC protection instead,
> > which will not set the NX bit.
> >
> > Cc: <stable@xxxxxxxxxxxxxxx>
> > Reported-by: Xin Li <xin@xxxxxxxxx>
> > Fixes: 5185e7f9f3bd ("x86/module: enable ROX caches for module text on 64 bit")
> > Signed-off-by: Juergen Gross <jgross@xxxxxxxx>
> > ---
> > arch/x86/mm/init.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
> > index 7456df985d96..f5012ae31d8b 100644
> > --- a/arch/x86/mm/init.c
> > +++ b/arch/x86/mm/init.c
> > @@ -1089,7 +1089,7 @@ struct execmem_info __init *execmem_arch_setup(void)
> > pgprot = PAGE_KERNEL_ROX;
> > flags = EXECMEM_KASAN_SHADOW | EXECMEM_ROX_CACHE;
> > } else {
> > - pgprot = PAGE_KERNEL;
> > + pgprot = PAGE_KERNEL_EXEC;
>
> Please don't. Everything except ITS can work with PAGE_KENREL so the fix
> should be on ITS side.

Well, this is early vs post make_ro again.

Does something like so work for you?

---
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 7456df985d96..f5012ae31d8b 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -1089,7 +1089,7 @@ struct execmem_info __init *execmem_arch_setup(void)
pgprot = PAGE_KERNEL_ROX;
flags = EXECMEM_KASAN_SHADOW | EXECMEM_ROX_CACHE;
} else {
- pgprot = PAGE_KERNEL;
+ pgprot = PAGE_KERNEL_EXEC;
flags = EXECMEM_KASAN_SHADOW;
}

diff --git a/mm/execmem.c b/mm/execmem.c
index 6f7a2653b280..dbe2eedea0e6 100644
--- a/mm/execmem.c
+++ b/mm/execmem.c
@@ -258,6 +258,7 @@ static bool execmem_cache_rox = false;

void execmem_cache_make_ro(void)
{
+ struct execmem_range *module_text = &execmem_info->ranges[EXECMEM_MODULE_TEXT];
struct maple_tree *free_areas = &execmem_cache.free_areas;
struct maple_tree *busy_areas = &execmem_cache.busy_areas;
MA_STATE(mas_free, free_areas, 0, ULONG_MAX);
@@ -269,6 +270,9 @@ void execmem_cache_make_ro(void)

mutex_lock(mutex);

+ if (!(module_text->flags & EXECMEM_ROX_CACHE))
+ module_text->pgprot = PAGE_KERNEL;
+
mas_for_each(&mas_free, area, ULONG_MAX) {
unsigned long pages = mas_range_len(&mas_free) >> PAGE_SHIFT;
set_memory_ro(mas_free.index, pages);

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From: Ujwal Kundur <ujwal.kundur@xxxxxxxxx>
Date: Fri, 30 May 2025 13:15:14 +0530
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Subject: Re: [PATCH v3 1/1] selftests/mm/uffd: Refactor non-composite global
vars into struct
To: Brendan Jackman <jackmanb@xxxxxxxxxx>
Cc: akpm@xxxxxxxxxxxxxxxxxxxx, peterx@xxxxxxxxxx, shuah@xxxxxxxxxx,
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> Sorry I don't have an opinion on which of these is the best (I can try
> to find some time to form an opionion on this later!), but:
>
> Fixing the flakiness sounds great, but I would suggest decoupling that
> from the refactoring. If it's practical, focus on removing the globals
> first, while leaving the fundamental logic the same, even if it's bad.
> Then as a separate series, fix the logic.

Thanks, much appreciated. I'll send a patch with the refactoring + a comment
regarding this variable left-in and follow-up with a fix.

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From: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
To: Hans Verkuil <hverkuil-cisco@xxxxxxxxx>, Mauro Carvalho Chehab
<mchehab@xxxxxxxxxx>, Rob Herring <robh@xxxxxxxxxx>, Krzysztof Kozlowski
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CC: <srv_heupstream@xxxxxxxxxxxx>
Subject: [PATCH v5 00/12] Enable jpeg enc & dec multi-hardwares for MT8196
Date: Fri, 30 May 2025 15:45:25 +0800
Message-ID: <20250530074537.26338-1-kyrie.wu@xxxxxxxxxxxx>
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This series adds support for mt8196 multi-hardwares jpeg enc & dec,
by first adding mt8196 jpegdec and jpegenc compatible to install
kernel driver. Add smmu setting to support smmu and iommu at the
same time.
Secondly refactor buffer and clock setting to support multi-hw jpeg
working.
Lastly, fix some bugs, including resolution change handleing, stop
streaming sw flow and others.

This series has been tested with MT8196 tast test.
Encoding and decoding worked for this chip.

Patches 1-3 Adds jpeg encoder and decoder compatible.
Patches 4 add jpeg smmu sid setting.
Patches 5 fix jpeg hw count setting to support different chips.
Patches 6 refactor jpeg buffer payload setting to handle buffer
size bug while resolution changed.
Patches 7 reconstruct jpeg dst buffer layout.
Patches 8 fix multi-core stop streaming flow
Patches 9 refactor multi-core clk suspend/resume setting
Patches 10 fix decoding buffer number setting timing issue
Patches 11 refactor decoding resolution change operation
Patches 12 fix remove buffer operation

---
This series patches dependent on:
[1]
https://patchwork.linuxtv.org/project/linux-media/patch/20250424090824.5309-1-jianhua.lin@xxxxxxxxxxxx/

Changes compared with v4:
--fix kernel robot build errors for patch 4.
--add reviewer for patch 1 and patch 2.

Changes compared with v3:
--change patch subject of jpeg encoder and decoder compatible.

Changes compared with v2:
--refactor smmu sid setting function interface
--Some modifications for patch v2's review comments.

Changes compared with v1:
--refine jpeg dt-bindings for MT8196
--optimize software code to manage jpeg HW count
--refactor smmu sid setting function interface
--Some modifications for patch v1's review comments.

Kyrie Wu (12):
media: dt-bindings: mediatek,jpeg: Add mediatek, mt8196-jpgdec
compatible
media: dt-bindings: mediatek,jpeg: Add mediatek, mt8196-jpgenc
compatible
media: mediatek: jpeg: add jpeg compatible
media: mediatek: jpeg: add jpeg smmu sid setting
media: mediatek: jpeg: fix jpeg hw count setting
media: mediatek: jpeg: refactor jpeg buffer payload setting
media: mediatek: jpeg: refactor jpeg dst buffer layout
media: mediatek: jpeg: fix stop streaming flow for multi-core
media: mediatek: jpeg: refactor multi-core clk suspend and resume
setting
media: mediatek: jpeg: fix decoding buffer number setting timing issue
media: mediatek: jpeg: refactor decoding resolution change operation
media: mediatek: jpeg: fix remove buffer operation for multi-core

.../media/mediatek,mt8195-jpegdec.yaml | 8 +-
.../media/mediatek,mt8195-jpegenc.yaml | 8 +-
.../platform/mediatek/jpeg/mtk_jpeg_core.c | 169 +++++++++++++-----
.../platform/mediatek/jpeg/mtk_jpeg_core.h | 21 ++-
.../platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 112 +++++++++++-
.../platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 112 +++++++++++-
6 files changed, 377 insertions(+), 53 deletions(-)

--
2.46.0

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From: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
To: Hans Verkuil <hverkuil-cisco@xxxxxxxxx>, Mauro Carvalho Chehab
<mchehab@xxxxxxxxxx>, Rob Herring <robh@xxxxxxxxxx>, Krzysztof Kozlowski
<krzk+dt@xxxxxxxxxx>, Conor Dooley <conor+dt@xxxxxxxxxx>, Matthias Brugger
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CC: <srv_heupstream@xxxxxxxxxxxx>
Subject: [PATCH v5 06/12] media: mediatek: jpeg: refactor jpeg buffer payload setting
Date: Fri, 30 May 2025 15:45:31 +0800
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1. for multi-core jpegdec:
core0: |<-------- decoding buffer0 and resolution changed to smaller
core1: |<-------- decoding buffer1
core0: |<- handling resolution changing
core0: |<- vb2_set_plane_payload
2. the payload size is changed on the step of set format. Because core1
is running and streaming has not been stopped, the format cannot be
set again, resulting in no change in the payload size.
3. at this time, the payload size is bigger than buffer length,
it will print a warnning call trace
4. set payload size must less than buffer length

Signed-off-by: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
---
.../platform/mediatek/jpeg/mtk_jpeg_core.c | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index 0074d1edb534..52d59bb5c9ad 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
@@ -720,10 +720,22 @@ static int mtk_jpeg_buf_prepare(struct vb2_buffer *vb)
plane_fmt = q_data->pix_mp.plane_fmt[i];
if (ctx->enable_exif &&
q_data->fmt->fourcc == V4L2_PIX_FMT_JPEG)
- vb2_set_plane_payload(vb, i, plane_fmt.sizeimage +
- MTK_JPEG_MAX_EXIF_SIZE);
+ if (vb->planes[i].length > (plane_fmt.sizeimage +
+ MTK_JPEG_MAX_EXIF_SIZE))
+ vb2_set_plane_payload(vb, i,
+ plane_fmt.sizeimage +
+ MTK_JPEG_MAX_EXIF_SIZE);
+ else
+ vb2_set_plane_payload(vb, i,
+ vb->planes[i].length);
+
else
- vb2_set_plane_payload(vb, i, plane_fmt.sizeimage);
+ if (vb->planes[i].length > plane_fmt.sizeimage)
+ vb2_set_plane_payload(vb, i,
+ plane_fmt.sizeimage);
+ else
+ vb2_set_plane_payload(vb, i,
+ vb->planes[i].length);
}

return 0;
--
2.46.0

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CC: <srv_heupstream@xxxxxxxxxxxx>
Subject: [PATCH v5 08/12] media: mediatek: jpeg: fix stop streaming flow for multi-core
Date: Fri, 30 May 2025 15:45:33 +0800
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1. For multi-core jpegdec, the all hws may run at the same time,
if one hw decoded firstly, the function of mtk_jpeg_dec_stop_streaming
would be called, but others input buffers are decoding, this will
cause some running buffers to be buffer done, causing errors;
2. add a parameter to calculate the decoding buffer counts, it
wil decrease to 0 until the all buffers decoded and the
mtk_jpeg_dec_stop_streaming could continue to be executed.

Signed-off-by: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
---
.../media/platform/mediatek/jpeg/mtk_jpeg_core.c | 16 ++++++++++++++++
.../media/platform/mediatek/jpeg/mtk_jpeg_core.h | 2 ++
.../platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 9 +++++++++
.../platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 9 +++++++++
4 files changed, 36 insertions(+)

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index 7e3509be6f69..1d3df1230191 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
@@ -861,8 +861,12 @@ static struct vb2_v4l2_buffer *mtk_jpeg_buf_remove(struct mtk_jpeg_ctx *ctx,
static void mtk_jpeg_enc_stop_streaming(struct vb2_queue *q)
{
struct mtk_jpeg_ctx *ctx = vb2_get_drv_priv(q);
+ struct mtk_jpeg_dev *jpeg = ctx->jpeg;
struct vb2_v4l2_buffer *vb;

+ if (jpeg->variant->multi_core)
+ wait_event(jpeg->hw_wq, (atomic_read(&ctx->buf_list_cnt) == 0));
+
while ((vb = mtk_jpeg_buf_remove(ctx, q->type)))
v4l2_m2m_buf_done(vb, VB2_BUF_STATE_ERROR);
}
@@ -870,6 +874,7 @@ static void mtk_jpeg_enc_stop_streaming(struct vb2_queue *q)
static void mtk_jpeg_dec_stop_streaming(struct vb2_queue *q)
{
struct mtk_jpeg_ctx *ctx = vb2_get_drv_priv(q);
+ struct mtk_jpeg_dev *jpeg = ctx->jpeg;
struct vb2_v4l2_buffer *vb;

/*
@@ -877,6 +882,9 @@ static void mtk_jpeg_dec_stop_streaming(struct vb2_queue *q)
* Before STREAMOFF, we still have to return the old resolution and
* subsampling. Update capture queue when the stream is off.
*/
+ if (jpeg->variant->multi_core)
+ wait_event(jpeg->hw_wq, (atomic_read(&ctx->buf_list_cnt) == 0));
+
if (ctx->state == MTK_JPEG_SOURCE_CHANGE &&
V4L2_TYPE_IS_CAPTURE(q->type)) {
struct mtk_jpeg_src_buf *src_buf;
@@ -1186,6 +1194,7 @@ static int mtk_jpeg_open(struct file *file)
v4l2_fh_init(&ctx->fh, vfd);
file->private_data = &ctx->fh;
v4l2_fh_add(&ctx->fh);
+ atomic_set(&ctx->buf_list_cnt, 0);

ctx->jpeg = jpeg;
ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(jpeg->m2m_dev, ctx,
@@ -1568,6 +1577,11 @@ static int mtk_jpegdec_set_hw_param(struct mtk_jpeg_ctx *ctx,
return 0;
}

+static void jpeg_buf_queue_inc(struct mtk_jpeg_ctx *ctx)
+{
+ atomic_inc(&ctx->buf_list_cnt);
+}
+
static irqreturn_t mtk_jpeg_enc_done(struct mtk_jpeg_dev *jpeg)
{
struct mtk_jpeg_ctx *ctx;
@@ -1693,6 +1707,7 @@ static void mtk_jpegenc_worker(struct work_struct *work)
&src_buf->vb2_buf);
mtk_jpeg_set_enc_params(ctx, comp_jpeg[hw_id]->reg_base);
mtk_jpeg_enc_start(comp_jpeg[hw_id]->reg_base);
+ jpeg_buf_queue_inc(ctx);
v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx);
spin_unlock_irqrestore(&comp_jpeg[hw_id]->hw_lock, flags);

@@ -1825,6 +1840,7 @@ static void mtk_jpegdec_worker(struct work_struct *work)
&bs,
&fb);
mtk_jpeg_dec_start(comp_jpeg[hw_id]->reg_base);
+ jpeg_buf_queue_inc(ctx);
v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx);
spin_unlock_irqrestore(&comp_jpeg[hw_id]->hw_lock, flags);

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h
index 186cd1862028..6e8304680393 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h
@@ -303,6 +303,7 @@ struct mtk_jpeg_q_data {
* @dst_done_queue: encoded frame buffer queue
* @done_queue_lock: encoded frame operation spinlock
* @last_done_frame_num: the last encoded frame number
+ * @buf_list_cnt: the frame buffer count own by jpeg driver
*/
struct mtk_jpeg_ctx {
struct mtk_jpeg_dev *jpeg;
@@ -321,6 +322,7 @@ struct mtk_jpeg_ctx {
/* spinlock protecting the encode done buffer */
spinlock_t done_queue_lock;
u32 last_done_frame_num;
+ atomic_t buf_list_cnt;
};

#endif /* _MTK_JPEG_CORE_H */
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
index 2200f3b628dc..2e6da8617484 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
@@ -522,6 +522,11 @@ static void mtk_jpegdec_put_buf(struct mtk_jpegdec_comp_dev *jpeg)
spin_unlock_irqrestore(&ctx->done_queue_lock, flags);
}

+static void jpeg_buf_queue_dec(struct mtk_jpeg_ctx *ctx)
+{
+ atomic_dec(&ctx->buf_list_cnt);
+}
+
static void mtk_jpegdec_timeout_work(struct work_struct *work)
{
enum vb2_buffer_state buf_state = VB2_BUF_STATE_ERROR;
@@ -530,9 +535,11 @@ static void mtk_jpegdec_timeout_work(struct work_struct *work)
job_timeout_work.work);
struct mtk_jpeg_dev *master_jpeg = cjpeg->master_dev;
struct vb2_v4l2_buffer *src_buf, *dst_buf;
+ struct mtk_jpeg_ctx *ctx;

src_buf = cjpeg->hw_param.src_buffer;
dst_buf = cjpeg->hw_param.dst_buffer;
+ ctx = cjpeg->hw_param.curr_ctx;
v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, true);

mtk_jpeg_dec_reset(cjpeg->reg_base);
@@ -543,6 +550,7 @@ static void mtk_jpegdec_timeout_work(struct work_struct *work)
wake_up(&master_jpeg->hw_wq);
v4l2_m2m_buf_done(src_buf, buf_state);
mtk_jpegdec_put_buf(cjpeg);
+ jpeg_buf_queue_dec(ctx);
}

static irqreturn_t mtk_jpegdec_hw_irq_handler(int irq, void *priv)
@@ -583,6 +591,7 @@ static irqreturn_t mtk_jpegdec_hw_irq_handler(int irq, void *priv)
buf_state = VB2_BUF_STATE_DONE;
v4l2_m2m_buf_done(src_buf, buf_state);
mtk_jpegdec_put_buf(jpeg);
+ jpeg_buf_queue_dec(ctx);
pm_runtime_put(ctx->jpeg->dev);
clk_disable_unprepare(jpeg->jdec_clk.clks->clk);

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
index 4c264c14ad83..ff73393a2417 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
@@ -251,6 +251,11 @@ static void mtk_jpegenc_put_buf(struct mtk_jpegenc_comp_dev *jpeg)
spin_unlock_irqrestore(&ctx->done_queue_lock, flags);
}

+static void jpeg_buf_queue_dec(struct mtk_jpeg_ctx *ctx)
+{
+ atomic_dec(&ctx->buf_list_cnt);
+}
+
static void mtk_jpegenc_timeout_work(struct work_struct *work)
{
struct delayed_work *dly_work = to_delayed_work(work);
@@ -261,9 +266,11 @@ static void mtk_jpegenc_timeout_work(struct work_struct *work)
struct mtk_jpeg_dev *master_jpeg = cjpeg->master_dev;
enum vb2_buffer_state buf_state = VB2_BUF_STATE_ERROR;
struct vb2_v4l2_buffer *src_buf, *dst_buf;
+ struct mtk_jpeg_ctx *ctx;

src_buf = cjpeg->hw_param.src_buffer;
dst_buf = cjpeg->hw_param.dst_buffer;
+ ctx = cjpeg->hw_param.curr_ctx;
v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, true);

mtk_jpeg_enc_reset(cjpeg->reg_base);
@@ -274,6 +281,7 @@ static void mtk_jpegenc_timeout_work(struct work_struct *work)
wake_up(&master_jpeg->hw_wq);
v4l2_m2m_buf_done(src_buf, buf_state);
mtk_jpegenc_put_buf(cjpeg);
+ jpeg_buf_queue_dec(ctx);
}

static irqreturn_t mtk_jpegenc_hw_irq_handler(int irq, void *priv)
@@ -307,6 +315,7 @@ static irqreturn_t mtk_jpegenc_hw_irq_handler(int irq, void *priv)
buf_state = VB2_BUF_STATE_DONE;
v4l2_m2m_buf_done(src_buf, buf_state);
mtk_jpegenc_put_buf(jpeg);
+ jpeg_buf_queue_dec(ctx);
pm_runtime_put(ctx->jpeg->dev);
clk_disable_unprepare(jpeg->venc_clk.clks->clk);

--
2.46.0

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From: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
To: Hans Verkuil <hverkuil-cisco@xxxxxxxxx>, Mauro Carvalho Chehab
<mchehab@xxxxxxxxxx>, Rob Herring <robh@xxxxxxxxxx>, Krzysztof Kozlowski
<krzk+dt@xxxxxxxxxx>, Conor Dooley <conor+dt@xxxxxxxxxx>, Matthias Brugger
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<linux-mediatek@xxxxxxxxxxxxxxxxxxx>
CC: <srv_heupstream@xxxxxxxxxxxx>
Subject: [PATCH v5 11/12] media: mediatek: jpeg: refactor decoding resolution change operation
Date: Fri, 30 May 2025 15:45:36 +0800
Message-ID: <20250530074537.26338-12-kyrie.wu@xxxxxxxxxxxx>
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For multi-core:
1.if there are only two src buffers, hw0 and hw1 are decoding
at the same time. When resolution change occurred on one hw,
the src buffer cannot be got in the stop streaming function,
which will cause a crash.
2.When a resolution change occurs, immediately set the new
resolution parameter to save the new resolution;
3.After a resolution change occurred, decoding should not continue,
needs to wait until new buffers are ready and the state machine
changed.

Signed-off-by: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
---
drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index 795916206c7c..eba9f58b9198 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
@@ -891,7 +891,8 @@ static void mtk_jpeg_dec_stop_streaming(struct vb2_queue *q)

vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
src_buf = mtk_jpeg_vb2_to_srcbuf(&vb->vb2_buf);
- mtk_jpeg_set_queue_data(ctx, &src_buf->dec_param);
+ if (!IS_ERR_OR_NULL(src_buf))
+ mtk_jpeg_set_queue_data(ctx, &src_buf->dec_param);
ctx->state = MTK_JPEG_RUNNING;
} else if (V4L2_TYPE_IS_OUTPUT(q->type)) {
ctx->state = MTK_JPEG_INIT;
@@ -1785,11 +1786,15 @@ static void mtk_jpegdec_worker(struct work_struct *work)

if (mtk_jpeg_check_resolution_change(ctx,
&jpeg_src_buf->dec_param)) {
- mtk_jpeg_queue_src_chg_event(ctx);
+ mtk_jpeg_set_queue_data(ctx, &jpeg_src_buf->dec_param);
ctx->state = MTK_JPEG_SOURCE_CHANGE;
+ mtk_jpeg_queue_src_chg_event(ctx);
goto getbuf_fail;
}

+ if (ctx->state == MTK_JPEG_SOURCE_CHANGE)
+ goto getbuf_fail;
+
mtk_jpegdec_set_hw_param(ctx, hw_id, src_buf, dst_buf);
ret = pm_runtime_resume_and_get(comp_jpeg[hw_id]->dev);
if (ret < 0) {
--
2.46.0

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From: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
To: Hans Verkuil <hverkuil-cisco@xxxxxxxxx>, Mauro Carvalho Chehab
<mchehab@xxxxxxxxxx>, Rob Herring <robh@xxxxxxxxxx>, Krzysztof Kozlowski
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CC: <srv_heupstream@xxxxxxxxxxxx>
Subject: [PATCH v5 03/12] media: mediatek: jpeg: add jpeg compatible
Date: Fri, 30 May 2025 15:45:28 +0800
Message-ID: <20250530074537.26338-4-kyrie.wu@xxxxxxxxxxxx>
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Add jpeg dec and enc compatible for mt8196

Signed-off-by: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
---
.../platform/mediatek/jpeg/mtk_jpeg_core.c | 34 +++++++++++++++++++
.../platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 3 ++
.../platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 3 ++
3 files changed, 40 insertions(+)

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index 7eb12449b63a..e89ccb8c904c 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
@@ -1918,6 +1918,19 @@ static struct mtk_jpeg_variant mtk8195_jpegenc_drvdata = {
.jpeg_worker = mtk_jpegenc_worker,
};

+static struct mtk_jpeg_variant mtk8196_jpegenc_drvdata = {
+ .formats = mtk_jpeg_enc_formats,
+ .num_formats = MTK_JPEG_ENC_NUM_FORMATS,
+ .qops = &mtk_jpeg_enc_qops,
+ .m2m_ops = &mtk_jpeg_multicore_enc_m2m_ops,
+ .dev_name = "mtk-jpeg-enc",
+ .ioctl_ops = &mtk_jpeg_enc_ioctl_ops,
+ .out_q_default_fourcc = V4L2_PIX_FMT_YUYV,
+ .cap_q_default_fourcc = V4L2_PIX_FMT_JPEG,
+ .multi_core = true,
+ .jpeg_worker = mtk_jpegenc_worker,
+};
+
static const struct mtk_jpeg_variant mtk8195_jpegdec_drvdata = {
.formats = mtk_jpeg_dec_formats,
.num_formats = MTK_JPEG_DEC_NUM_FORMATS,
@@ -1931,6 +1944,19 @@ static const struct mtk_jpeg_variant mtk8195_jpegdec_drvdata = {
.jpeg_worker = mtk_jpegdec_worker,
};

+static const struct mtk_jpeg_variant mtk8196_jpegdec_drvdata = {
+ .formats = mtk_jpeg_dec_formats,
+ .num_formats = MTK_JPEG_DEC_NUM_FORMATS,
+ .qops = &mtk_jpeg_dec_qops,
+ .m2m_ops = &mtk_jpeg_multicore_dec_m2m_ops,
+ .dev_name = "mtk-jpeg-dec",
+ .ioctl_ops = &mtk_jpeg_dec_ioctl_ops,
+ .out_q_default_fourcc = V4L2_PIX_FMT_JPEG,
+ .cap_q_default_fourcc = V4L2_PIX_FMT_YUV420M,
+ .multi_core = true,
+ .jpeg_worker = mtk_jpegdec_worker,
+};
+
static const struct of_device_id mtk_jpeg_match[] = {
{
.compatible = "mediatek,mt8173-jpgdec",
@@ -1952,6 +1978,14 @@ static const struct of_device_id mtk_jpeg_match[] = {
.compatible = "mediatek,mt8195-jpgdec",
.data = &mtk8195_jpegdec_drvdata,
},
+ {
+ .compatible = "mediatek,mt8196-jpgenc",
+ .data = &mtk8196_jpegenc_drvdata,
+ },
+ {
+ .compatible = "mediatek,mt8196-jpgdec",
+ .data = &mtk8196_jpegdec_drvdata,
+ },
{},
};

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
index e78e1d11093c..20553bf541df 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
@@ -45,6 +45,9 @@ static const struct of_device_id mtk_jpegdec_hw_ids[] = {
{
.compatible = "mediatek,mt8195-jpgdec-hw",
},
+ {
+ .compatible = "mediatek,mt8196-jpgdec-hw",
+ },
{},
};
MODULE_DEVICE_TABLE(of, mtk_jpegdec_hw_ids);
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
index 9ab27aee302a..69c95113f205 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
@@ -52,6 +52,9 @@ static const struct of_device_id mtk_jpegenc_drv_ids[] = {
{
.compatible = "mediatek,mt8195-jpgenc-hw",
},
+ {
+ .compatible = "mediatek,mt8196-jpgenc-hw",
+ },
{},
};
MODULE_DEVICE_TABLE(of, mtk_jpegenc_drv_ids);
--
2.46.0

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From: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
To: Hans Verkuil <hverkuil-cisco@xxxxxxxxx>, Mauro Carvalho Chehab
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CC: <srv_heupstream@xxxxxxxxxxxx>, Krzysztof Kozlowski
<krzysztof.kozlowski@xxxxxxxxxx>
Subject: [PATCH v5 02/12] media: dt-bindings: mediatek,jpeg: Add mediatek, mt8196-jpgenc compatible
Date: Fri, 30 May 2025 15:45:27 +0800
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Compared to the previous generation IC, the MT8196 uses SMMU
instead of IOMMU and supports features such as dynamic voltage
and frequency scaling. Therefore, add "mediatek,mt8196-jpgenc"
compatible to the binding document.

Signed-off-by: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
---
.../bindings/media/mediatek,mt8195-jpegenc.yaml | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml b/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml
index 596186497b68..e2d772ea0fb0 100644
--- a/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml
@@ -14,7 +14,9 @@ description:

properties:
compatible:
- const: mediatek,mt8195-jpgenc
+ enum:
+ - mediatek,mt8195-jpgenc
+ - mediatek,mt8196-jpgenc

power-domains:
maxItems: 1
@@ -44,7 +46,9 @@ patternProperties:

properties:
compatible:
- const: mediatek,mt8195-jpgenc-hw
+ enum:
+ - mediatek,mt8195-jpgenc-hw
+ - mediatek,mt8196-jpgenc-hw

reg:
maxItems: 1
--
2.46.0

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From: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
To: Hans Verkuil <hverkuil-cisco@xxxxxxxxx>, Mauro Carvalho Chehab
<mchehab@xxxxxxxxxx>, Rob Herring <robh@xxxxxxxxxx>, Krzysztof Kozlowski
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CC: <srv_heupstream@xxxxxxxxxxxx>
Subject: [PATCH v5 10/12] media: mediatek: jpeg: fix decoding buffer number setting timing issue
Date: Fri, 30 May 2025 15:45:35 +0800
Message-ID: <20250530074537.26338-11-kyrie.wu@xxxxxxxxxxxx>
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move decoding buffer increase code into spinlock
protecting aera for multi-core

Signed-off-by: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
---
drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 9 +++------
drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 1 +
drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 1 +
3 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index c1d2de92f125..795916206c7c 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
@@ -1782,7 +1782,6 @@ static void mtk_jpegdec_worker(struct work_struct *work)

v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, true);
jpeg_src_buf = mtk_jpeg_vb2_to_srcbuf(&src_buf->vb2_buf);
- jpeg_dst_buf = mtk_jpeg_vb2_to_srcbuf(&dst_buf->vb2_buf);

if (mtk_jpeg_check_resolution_change(ctx,
&jpeg_src_buf->dec_param)) {
@@ -1791,11 +1790,6 @@ static void mtk_jpegdec_worker(struct work_struct *work)
goto getbuf_fail;
}

- jpeg_src_buf->curr_ctx = ctx;
- jpeg_src_buf->frame_num = ctx->total_frame_num;
- jpeg_dst_buf->curr_ctx = ctx;
- jpeg_dst_buf->frame_num = ctx->total_frame_num;
-
mtk_jpegdec_set_hw_param(ctx, hw_id, src_buf, dst_buf);
ret = pm_runtime_resume_and_get(comp_jpeg[hw_id]->dev);
if (ret < 0) {
@@ -1820,6 +1814,9 @@ static void mtk_jpegdec_worker(struct work_struct *work)
msecs_to_jiffies(MTK_JPEG_HW_TIMEOUT_MSEC));

spin_lock_irqsave(&comp_jpeg[hw_id]->hw_lock, flags);
+ jpeg_dst_buf = mtk_jpeg_vb2_to_srcbuf(&dst_buf->vb2_buf);
+ jpeg_dst_buf->curr_ctx = ctx;
+ jpeg_dst_buf->frame_num = ctx->total_frame_num;
ctx->total_frame_num++;
mtk_jpeg_dec_reset(comp_jpeg[hw_id]->reg_base);

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
index db2afc5151ad..da753a636eaa 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
@@ -516,6 +516,7 @@ static void mtk_jpegdec_put_buf(struct mtk_jpegdec_comp_dev *jpeg)
v4l2_m2m_buf_done(&tmp_dst_done_buf->b,
VB2_BUF_STATE_DONE);
ctx->last_done_frame_num++;
+ break;
}
}
}
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
index 27da2a9922a6..5e8a5cb4850e 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
@@ -245,6 +245,7 @@ static void mtk_jpegenc_put_buf(struct mtk_jpegenc_comp_dev *jpeg)
v4l2_m2m_buf_done(&tmp_dst_done_buf->b,
VB2_BUF_STATE_DONE);
ctx->last_done_frame_num++;
+ break;
}
}
}
--
2.46.0

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To: Hans Verkuil <hverkuil-cisco@xxxxxxxxx>, Mauro Carvalho Chehab
<mchehab@xxxxxxxxxx>, Rob Herring <robh@xxxxxxxxxx>, Krzysztof Kozlowski
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CC: <srv_heupstream@xxxxxxxxxxxx>, Krzysztof Kozlowski
<krzysztof.kozlowski@xxxxxxxxxx>
Subject: [PATCH v5 01/12] media: dt-bindings: mediatek,jpeg: Add mediatek, mt8196-jpgdec compatible
Date: Fri, 30 May 2025 15:45:26 +0800
Message-ID: <20250530074537.26338-2-kyrie.wu@xxxxxxxxxxxx>
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Compared to the previous generation IC, the MT8196 uses SMMU
instead of IOMMU and supports features such as dynamic voltage
and frequency scaling. Therefore, add "mediatek,mt8196-jpgdec"
compatible to the binding document.

Signed-off-by: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
---
.../bindings/media/mediatek,mt8195-jpegdec.yaml | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegdec.yaml b/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegdec.yaml
index e5448c60e3eb..28a9a9bfdbf8 100644
--- a/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegdec.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegdec.yaml
@@ -14,7 +14,9 @@ description:

properties:
compatible:
- const: mediatek,mt8195-jpgdec
+ enum:
+ - mediatek,mt8195-jpgdec
+ - mediatek,mt8196-jpgdec

power-domains:
maxItems: 1
@@ -44,7 +46,9 @@ patternProperties:

properties:
compatible:
- const: mediatek,mt8195-jpgdec-hw
+ enum:
+ - mediatek,mt8195-jpgdec-hw
+ - mediatek,mt8196-jpgdec-hw

reg:
maxItems: 1
--
2.46.0

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From: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
To: Hans Verkuil <hverkuil-cisco@xxxxxxxxx>, Mauro Carvalho Chehab
<mchehab@xxxxxxxxxx>, Rob Herring <robh@xxxxxxxxxx>, Krzysztof Kozlowski
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CC: <srv_heupstream@xxxxxxxxxxxx>
Subject: [PATCH v5 12/12] media: mediatek: jpeg: fix remove buffer operation for multi-core
Date: Fri, 30 May 2025 15:45:37 +0800
Message-ID: <20250530074537.26338-13-kyrie.wu@xxxxxxxxxxxx>
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move remove buffer code to spinlock protect area for multi-core

Signed-off-by: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
---
drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index eba9f58b9198..34fa03bcfdd3 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
@@ -1684,9 +1684,6 @@ static void mtk_jpegenc_worker(struct work_struct *work)
goto enc_end;
}

- v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
- v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
-
schedule_delayed_work(&comp_jpeg[hw_id]->job_timeout_work,
msecs_to_jiffies(MTK_JPEG_HW_TIMEOUT_MSEC));

@@ -1707,6 +1704,8 @@ static void mtk_jpegenc_worker(struct work_struct *work)
&src_buf->vb2_buf);
mtk_jpeg_set_enc_params(ctx, comp_jpeg[hw_id]->reg_base);
mtk_jpeg_enc_start(comp_jpeg[hw_id]->reg_base);
+ v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
+ v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
jpeg_buf_queue_inc(ctx);
v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx);
spin_unlock_irqrestore(&comp_jpeg[hw_id]->hw_lock, flags);
@@ -1803,9 +1802,6 @@ static void mtk_jpegdec_worker(struct work_struct *work)
goto dec_end;
}

- v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
- v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
-
mtk_jpeg_set_dec_src(ctx, &src_buf->vb2_buf, &bs);
if (mtk_jpeg_set_dec_dst(ctx,
&jpeg_src_buf->dec_param,
@@ -1833,6 +1829,8 @@ static void mtk_jpegdec_worker(struct work_struct *work)
jpeg_src_buf->bs_size,
&bs,
&fb);
+ v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
+ v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
mtk_jpeg_dec_start(comp_jpeg[hw_id]->reg_base);
jpeg_buf_queue_inc(ctx);
v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx);
--
2.46.0

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From: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
To: Hans Verkuil <hverkuil-cisco@xxxxxxxxx>, Mauro Carvalho Chehab
<mchehab@xxxxxxxxxx>, Rob Herring <robh@xxxxxxxxxx>, Krzysztof Kozlowski
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CC: <srv_heupstream@xxxxxxxxxxxx>
Subject: [PATCH v5 05/12] media: mediatek: jpeg: fix jpeg hw count setting
Date: Fri, 30 May 2025 15:45:30 +0800
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1. different IC has different hw core;
2. use a parameter to set jpeg hw count.

Signed-off-by: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
---
drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 8 ++++----
drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h | 2 ++
drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 1 +
drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 1 +
4 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index ea890f01fa9e..0074d1edb534 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
@@ -1469,7 +1469,7 @@ static int mtk_jpegenc_get_hw(struct mtk_jpeg_ctx *ctx)
int i;

spin_lock_irqsave(&jpeg->hw_lock, flags);
- for (i = 0; i < MTK_JPEGENC_HW_MAX; i++) {
+ for (i = 0; i < jpeg->max_hw_count; i++) {
comp_jpeg = jpeg->enc_hw_dev[i];
if (comp_jpeg->hw_state == MTK_JPEG_HW_IDLE) {
hw_id = i;
@@ -1516,7 +1516,7 @@ static int mtk_jpegdec_get_hw(struct mtk_jpeg_ctx *ctx)
int i;

spin_lock_irqsave(&jpeg->hw_lock, flags);
- for (i = 0; i < MTK_JPEGDEC_HW_MAX; i++) {
+ for (i = 0; i < jpeg->max_hw_count; i++) {
comp_jpeg = jpeg->dec_hw_dev[i];
if (comp_jpeg->hw_state == MTK_JPEG_HW_IDLE) {
hw_id = i;
@@ -1613,7 +1613,7 @@ static void mtk_jpegenc_worker(struct work_struct *work)
jpeg_work);
struct mtk_jpeg_dev *jpeg = ctx->jpeg;

- for (i = 0; i < MTK_JPEGENC_HW_MAX; i++)
+ for (i = 0; i < jpeg->max_hw_count; i++)
comp_jpeg[i] = jpeg->enc_hw_dev[i];
i = 0;

@@ -1725,7 +1725,7 @@ static void mtk_jpegdec_worker(struct work_struct *work)
struct mtk_jpeg_fb fb;
unsigned long flags;

- for (i = 0; i < MTK_JPEGDEC_HW_MAX; i++)
+ for (i = 0; i < jpeg->max_hw_count; i++)
comp_jpeg[i] = jpeg->dec_hw_dev[i];
i = 0;

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h
index 46899512a5e6..655dc9c3280c 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h
@@ -227,6 +227,7 @@ struct mtk_jpegdec_comp_dev {
* @reg_decbase: jpg decode register base addr
* @dec_hw_dev: jpg decode hardware device
* @hw_index: jpg hw index
+ * @max_hw_count: jpeg hw-core count
*/
struct mtk_jpeg_dev {
struct mutex lock;
@@ -249,6 +250,7 @@ struct mtk_jpeg_dev {
void __iomem *reg_decbase[MTK_JPEGDEC_HW_MAX];
struct mtk_jpegdec_comp_dev *dec_hw_dev[MTK_JPEGDEC_HW_MAX];
atomic_t hw_index;
+ u32 max_hw_count;
};

/**
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
index 2538c49f8eda..2200f3b628dc 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
@@ -686,6 +686,7 @@ static int mtk_jpegdec_hw_probe(struct platform_device *pdev)
master_dev->dec_hw_dev[i] = dev;
master_dev->reg_decbase[i] = dev->reg_base;
dev->master_dev = master_dev;
+ master_dev->max_hw_count++;

ret = mtk_jpegdec_smmu_init(dev);
if (ret)
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
index fc7b7d404253..4c264c14ad83 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
@@ -408,6 +408,7 @@ static int mtk_jpegenc_hw_probe(struct platform_device *pdev)
master_dev->enc_hw_dev[i] = dev;
master_dev->reg_encbase[i] = dev->reg_base;
dev->master_dev = master_dev;
+ master_dev->max_hw_count++;

ret = mtk_jpegenc_smmu_init(dev);
if (ret)
--
2.46.0

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Subject: [PATCH v5 04/12] media: mediatek: jpeg: add jpeg smmu sid setting
Date: Fri, 30 May 2025 15:45:29 +0800
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Add a configuration to set jpeg dec & enc smmu sid

Signed-off-by: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
---
.../platform/mediatek/jpeg/mtk_jpeg_core.c | 37 +++++++++++++++++++
.../platform/mediatek/jpeg/mtk_jpeg_core.h | 15 ++++++++
.../platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 23 ++++++++++++
.../platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 23 ++++++++++++
4 files changed, 98 insertions(+)

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index e89ccb8c904c..ea890f01fa9e 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
@@ -15,6 +15,7 @@
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <media/v4l2-event.h>
@@ -1584,6 +1585,20 @@ static irqreturn_t mtk_jpeg_enc_done(struct mtk_jpeg_dev *jpeg)
return IRQ_HANDLED;
}

+static void mtk_jpeg_enc_set_smmu_sid(struct mtk_jpegenc_comp_dev *jpeg)
+{
+ struct mtk_jpeg_dev *mjpeg = jpeg->master_dev;
+
+ if (!mjpeg->variant->support_smmu || !jpeg->smmu_regmap)
+ return;
+
+ regmap_update_bits(jpeg->smmu_regmap, JPEG_ENC_SMMU_SID,
+ JPG_REG_GUSER_ID_MASK <<
+ JPG_REG_ENC_GUSER_ID_SHIFT,
+ JPG_REG_GUSER_ID_ENC_SID <<
+ JPG_REG_ENC_GUSER_ID_SHIFT);
+}
+
static void mtk_jpegenc_worker(struct work_struct *work)
{
struct mtk_jpegenc_comp_dev *comp_jpeg[MTK_JPEGENC_HW_MAX];
@@ -1655,6 +1670,9 @@ static void mtk_jpegenc_worker(struct work_struct *work)
jpeg_dst_buf->frame_num = ctx->total_frame_num;
ctx->total_frame_num++;
mtk_jpeg_enc_reset(comp_jpeg[hw_id]->reg_base);
+
+ mtk_jpeg_enc_set_smmu_sid(comp_jpeg[hw_id]);
+
mtk_jpeg_set_enc_dst(ctx,
comp_jpeg[hw_id]->reg_base,
&dst_buf->vb2_buf);
@@ -1679,6 +1697,20 @@ static void mtk_jpegenc_worker(struct work_struct *work)
v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx);
}

+static void mtk_jpeg_dec_set_smmu_sid(struct mtk_jpegdec_comp_dev *jpeg)
+{
+ struct mtk_jpeg_dev *mjpeg = jpeg->master_dev;
+
+ if (!mjpeg->variant->support_smmu || !jpeg->smmu_regmap)
+ return;
+
+ regmap_update_bits(jpeg->smmu_regmap, JPEG_DEC_SMMU_SID,
+ JPG_REG_GUSER_ID_MASK <<
+ JPG_REG_DEC_GUSER_ID_SHIFT,
+ JPG_REG_GUSER_ID_DEC_SID <<
+ JPG_REG_DEC_GUSER_ID_SHIFT);
+}
+
static void mtk_jpegdec_worker(struct work_struct *work)
{
struct mtk_jpeg_ctx *ctx = container_of(work, struct mtk_jpeg_ctx,
@@ -1771,6 +1803,9 @@ static void mtk_jpegdec_worker(struct work_struct *work)
spin_lock_irqsave(&comp_jpeg[hw_id]->hw_lock, flags);
ctx->total_frame_num++;
mtk_jpeg_dec_reset(comp_jpeg[hw_id]->reg_base);
+
+ mtk_jpeg_dec_set_smmu_sid(comp_jpeg[hw_id]);
+
mtk_jpeg_dec_set_config(comp_jpeg[hw_id]->reg_base,
jpeg->variant->support_34bit,
&jpeg_src_buf->dec_param,
@@ -1929,6 +1964,7 @@ static struct mtk_jpeg_variant mtk8196_jpegenc_drvdata = {
.cap_q_default_fourcc = V4L2_PIX_FMT_JPEG,
.multi_core = true,
.jpeg_worker = mtk_jpegenc_worker,
+ .support_smmu = true,
};

static const struct mtk_jpeg_variant mtk8195_jpegdec_drvdata = {
@@ -1955,6 +1991,7 @@ static const struct mtk_jpeg_variant mtk8196_jpegdec_drvdata = {
.cap_q_default_fourcc = V4L2_PIX_FMT_YUV420M,
.multi_core = true,
.jpeg_worker = mtk_jpegdec_worker,
+ .support_smmu = true,
};

static const struct of_device_id mtk_jpeg_match[] = {
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h
index 02ed0ed5b736..46899512a5e6 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h
@@ -11,6 +11,7 @@

#include <linux/clk.h>
#include <linux/interrupt.h>
+#include <linux/mfd/syscon.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-fh.h>
@@ -34,6 +35,14 @@

#define MTK_JPEG_MAX_EXIF_SIZE (64 * 1024)

+#define JPEG_DEC_SMMU_SID 0
+#define JPEG_ENC_SMMU_SID 0
+#define JPG_REG_GUSER_ID_MASK 0x7
+#define JPG_REG_GUSER_ID_DEC_SID 0x4
+#define JPG_REG_GUSER_ID_ENC_SID 0x5
+#define JPG_REG_DEC_GUSER_ID_SHIFT 8
+#define JPG_REG_ENC_GUSER_ID_SHIFT 4
+
#define MTK_JPEG_ADDR_MASK GENMASK(1, 0)

/**
@@ -65,6 +74,7 @@ enum mtk_jpeg_ctx_state {
* @multi_core: mark jpeg hw is multi_core or not
* @jpeg_worker: jpeg dec or enc worker
* @support_34bit: flag to check support for 34-bit DMA address
+ * @support_smmu: flag to check if support smmu
*/
struct mtk_jpeg_variant {
struct clk_bulk_data *clks;
@@ -82,6 +92,7 @@ struct mtk_jpeg_variant {
bool multi_core;
void (*jpeg_worker)(struct work_struct *work);
bool support_34bit;
+ bool support_smmu;
};

struct mtk_jpeg_src_buf {
@@ -150,6 +161,7 @@ struct mtk_jpegdec_clk {
* @hw_param: jpeg encode hw parameters
* @hw_state: record hw state
* @hw_lock: spinlock protecting the hw device resource
+ * @smmu_regmap: SMMU registers mapping
*/
struct mtk_jpegenc_comp_dev {
struct device *dev;
@@ -163,6 +175,7 @@ struct mtk_jpegenc_comp_dev {
enum mtk_jpeg_hw_state hw_state;
/* spinlock protecting the hw device resource */
spinlock_t hw_lock;
+ struct regmap *smmu_regmap;
};

/**
@@ -177,6 +190,7 @@ struct mtk_jpegenc_comp_dev {
* @hw_param: jpeg decode hw parameters
* @hw_state: record hw state
* @hw_lock: spinlock protecting hw
+ * @smmu_regmap: SMMU registers mapping
*/
struct mtk_jpegdec_comp_dev {
struct device *dev;
@@ -190,6 +204,7 @@ struct mtk_jpegdec_comp_dev {
enum mtk_jpeg_hw_state hw_state;
/* spinlock protecting the hw device resource */
spinlock_t hw_lock;
+ struct regmap *smmu_regmap;
};

/**
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
index 20553bf541df..2538c49f8eda 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
@@ -616,6 +616,25 @@ static int mtk_jpegdec_hw_init_irq(struct mtk_jpegdec_comp_dev *dev)
return 0;
}

+static int mtk_jpegdec_smmu_init(struct mtk_jpegdec_comp_dev *dev)
+{
+ struct mtk_jpeg_dev *master_dev = dev->master_dev;
+
+ if (!master_dev->variant->support_smmu)
+ return 0;
+
+ dev->smmu_regmap =
+ syscon_regmap_lookup_by_phandle(dev->plat_dev->dev.of_node,
+ "mediatek,smmu-config");
+ if (IS_ERR(dev->smmu_regmap)) {
+ return dev_err_probe(dev->dev, PTR_ERR(dev->smmu_regmap),
+ "mmap smmu_base failed(%ld)\n",
+ PTR_ERR(dev->smmu_regmap));
+ }
+
+ return 0;
+}
+
static int mtk_jpegdec_hw_probe(struct platform_device *pdev)
{
struct mtk_jpegdec_clk *jpegdec_clk;
@@ -668,6 +687,10 @@ static int mtk_jpegdec_hw_probe(struct platform_device *pdev)
master_dev->reg_decbase[i] = dev->reg_base;
dev->master_dev = master_dev;

+ ret = mtk_jpegdec_smmu_init(dev);
+ if (ret)
+ return ret;
+
platform_set_drvdata(pdev, dev);
pm_runtime_enable(&pdev->dev);

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
index 69c95113f205..fc7b7d404253 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
@@ -340,6 +340,25 @@ static int mtk_jpegenc_hw_init_irq(struct mtk_jpegenc_comp_dev *dev)
return 0;
}

+static int mtk_jpegenc_smmu_init(struct mtk_jpegenc_comp_dev *dev)
+{
+ struct mtk_jpeg_dev *master_dev = dev->master_dev;
+
+ if (!master_dev->variant->support_smmu)
+ return 0;
+
+ dev->smmu_regmap =
+ syscon_regmap_lookup_by_phandle(dev->plat_dev->dev.of_node,
+ "mediatek,smmu-config");
+ if (IS_ERR(dev->smmu_regmap)) {
+ return dev_err_probe(dev->dev, PTR_ERR(dev->smmu_regmap),
+ "mmap smmu_base failed(%ld)\n",
+ PTR_ERR(dev->smmu_regmap));
+ }
+
+ return 0;
+}
+
static int mtk_jpegenc_hw_probe(struct platform_device *pdev)
{
struct mtk_jpegenc_clk *jpegenc_clk;
@@ -390,6 +409,10 @@ static int mtk_jpegenc_hw_probe(struct platform_device *pdev)
master_dev->reg_encbase[i] = dev->reg_base;
dev->master_dev = master_dev;

+ ret = mtk_jpegenc_smmu_init(dev);
+ if (ret)
+ return ret;
+
platform_set_drvdata(pdev, dev);
pm_runtime_enable(&pdev->dev);

--
2.46.0

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Subject: [PATCH v5 09/12] media: mediatek: jpeg: refactor multi-core clk suspend and resume setting
Date: Fri, 30 May 2025 15:45:34 +0800
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X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lkml.rescloud.iu.edu

refactor jpeg clk suspend and resume setting for multi-core

Signed-off-by: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
---
.../platform/mediatek/jpeg/mtk_jpeg_core.c | 28 +++----
.../platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 75 ++++++++++++++++++-
.../platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 75 ++++++++++++++++++-
3 files changed, 151 insertions(+), 27 deletions(-)

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index 1d3df1230191..c1d2de92f125 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
@@ -1126,6 +1126,9 @@ static void mtk_jpeg_clk_on(struct mtk_jpeg_dev *jpeg)
{
int ret;

+ if (jpeg->variant->multi_core)
+ return;
+
ret = clk_bulk_prepare_enable(jpeg->variant->num_clks,
jpeg->variant->clks);
if (ret)
@@ -1134,6 +1137,9 @@ static void mtk_jpeg_clk_on(struct mtk_jpeg_dev *jpeg)

static void mtk_jpeg_clk_off(struct mtk_jpeg_dev *jpeg)
{
+ if (jpeg->variant->multi_core)
+ return;
+
clk_bulk_disable_unprepare(jpeg->variant->num_clks,
jpeg->variant->clks);
}
@@ -1677,13 +1683,6 @@ static void mtk_jpegenc_worker(struct work_struct *work)
goto enc_end;
}

- ret = clk_prepare_enable(comp_jpeg[hw_id]->venc_clk.clks->clk);
- if (ret) {
- dev_err(jpeg->dev, "%s : %d, jpegenc clk_prepare_enable fail\n",
- __func__, __LINE__);
- goto enc_end;
- }
-
v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);

@@ -1798,20 +1797,13 @@ static void mtk_jpegdec_worker(struct work_struct *work)
jpeg_dst_buf->frame_num = ctx->total_frame_num;

mtk_jpegdec_set_hw_param(ctx, hw_id, src_buf, dst_buf);
- ret = pm_runtime_get_sync(comp_jpeg[hw_id]->dev);
+ ret = pm_runtime_resume_and_get(comp_jpeg[hw_id]->dev);
if (ret < 0) {
dev_err(jpeg->dev, "%s : %d, pm_runtime_get_sync fail !!!\n",
__func__, __LINE__);
goto dec_end;
}

- ret = clk_prepare_enable(comp_jpeg[hw_id]->jdec_clk.clks->clk);
- if (ret) {
- dev_err(jpeg->dev, "%s : %d, jpegdec clk_prepare_enable fail\n",
- __func__, __LINE__);
- goto clk_end;
- }
-
v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);

@@ -1821,7 +1813,7 @@ static void mtk_jpegdec_worker(struct work_struct *work)
&dst_buf->vb2_buf, &fb)) {
dev_err(jpeg->dev, "%s : %d, mtk_jpeg_set_dec_dst fail\n",
__func__, __LINE__);
- goto setdst_end;
+ goto set_dst_fail;
}

schedule_delayed_work(&comp_jpeg[hw_id]->job_timeout_work,
@@ -1846,9 +1838,7 @@ static void mtk_jpegdec_worker(struct work_struct *work)

return;

-setdst_end:
- clk_disable_unprepare(comp_jpeg[hw_id]->jdec_clk.clks->clk);
-clk_end:
+set_dst_fail:
pm_runtime_put(comp_jpeg[hw_id]->dev);
dec_end:
v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
index 2e6da8617484..db2afc5151ad 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
@@ -543,14 +543,13 @@ static void mtk_jpegdec_timeout_work(struct work_struct *work)
v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, true);

mtk_jpeg_dec_reset(cjpeg->reg_base);
- clk_disable_unprepare(cjpeg->jdec_clk.clks->clk);
- pm_runtime_put(cjpeg->dev);
cjpeg->hw_state = MTK_JPEG_HW_IDLE;
atomic_inc(&master_jpeg->hw_rdy);
wake_up(&master_jpeg->hw_wq);
v4l2_m2m_buf_done(src_buf, buf_state);
mtk_jpegdec_put_buf(cjpeg);
jpeg_buf_queue_dec(ctx);
+ pm_runtime_put(cjpeg->dev);
}

static irqreturn_t mtk_jpegdec_hw_irq_handler(int irq, void *priv)
@@ -592,12 +591,11 @@ static irqreturn_t mtk_jpegdec_hw_irq_handler(int irq, void *priv)
v4l2_m2m_buf_done(src_buf, buf_state);
mtk_jpegdec_put_buf(jpeg);
jpeg_buf_queue_dec(ctx);
- pm_runtime_put(ctx->jpeg->dev);
- clk_disable_unprepare(jpeg->jdec_clk.clks->clk);

jpeg->hw_state = MTK_JPEG_HW_IDLE;
wake_up(&master_jpeg->hw_wq);
atomic_inc(&master_jpeg->hw_rdy);
+ pm_runtime_put(jpeg->dev);

return IRQ_HANDLED;
}
@@ -703,15 +701,84 @@ static int mtk_jpegdec_hw_probe(struct platform_device *pdev)

platform_set_drvdata(pdev, dev);
pm_runtime_enable(&pdev->dev);
+ ret = devm_clk_bulk_get(dev->dev,
+ jpegdec_clk->clk_num,
+ jpegdec_clk->clks);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to init clk\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static void mtk_jpeg_clk_on(struct mtk_jpegdec_comp_dev *jpeg)
+{
+ int ret;
+
+ ret = clk_bulk_prepare_enable(jpeg->jdec_clk.clk_num,
+ jpeg->jdec_clk.clks);
+ if (ret)
+ dev_err(jpeg->dev, "%s : %d, jpegdec clk_prepare_enable fail\n",
+ __func__, __LINE__);
+}
+
+static void mtk_jpeg_clk_off(struct mtk_jpegdec_comp_dev *jpeg)
+{
+ clk_bulk_disable_unprepare(jpeg->jdec_clk.clk_num,
+ jpeg->jdec_clk.clks);
+}
+
+static __maybe_unused int mtk_jpegdec_pm_suspend(struct device *dev)
+{
+ struct mtk_jpegdec_comp_dev *jpeg = dev_get_drvdata(dev);
+
+ mtk_jpeg_clk_off(jpeg);

return 0;
}

+static __maybe_unused int mtk_jpegdec_pm_resume(struct device *dev)
+{
+ struct mtk_jpegdec_comp_dev *jpeg = dev_get_drvdata(dev);
+
+ mtk_jpeg_clk_on(jpeg);
+
+ return 0;
+}
+
+static __maybe_unused int mtk_jpegdec_suspend(struct device *dev)
+{
+ struct mtk_jpegdec_comp_dev *jpeg = dev_get_drvdata(dev);
+
+ v4l2_m2m_suspend(jpeg->master_dev->m2m_dev);
+ return pm_runtime_force_suspend(dev);
+}
+
+static __maybe_unused int mtk_jpegdec_resume(struct device *dev)
+{
+ struct mtk_jpegdec_comp_dev *jpeg = dev_get_drvdata(dev);
+ int ret;
+
+ ret = pm_runtime_force_resume(dev);
+ if (ret < 0)
+ return ret;
+
+ v4l2_m2m_resume(jpeg->master_dev->m2m_dev);
+ return ret;
+}
+
+static const struct dev_pm_ops mtk_jpegdec_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(mtk_jpegdec_suspend, mtk_jpegdec_resume)
+ SET_RUNTIME_PM_OPS(mtk_jpegdec_pm_suspend, mtk_jpegdec_pm_resume, NULL)
+};
+
static struct platform_driver mtk_jpegdec_hw_driver = {
.probe = mtk_jpegdec_hw_probe,
.driver = {
.name = "mtk-jpegdec-hw",
.of_match_table = mtk_jpegdec_hw_ids,
+ .pm = &mtk_jpegdec_pm_ops,
},
};

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
index ff73393a2417..27da2a9922a6 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
@@ -274,14 +274,13 @@ static void mtk_jpegenc_timeout_work(struct work_struct *work)
v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, true);

mtk_jpeg_enc_reset(cjpeg->reg_base);
- clk_disable_unprepare(cjpeg->venc_clk.clks->clk);
- pm_runtime_put(cjpeg->dev);
cjpeg->hw_state = MTK_JPEG_HW_IDLE;
atomic_inc(&master_jpeg->hw_rdy);
wake_up(&master_jpeg->hw_wq);
v4l2_m2m_buf_done(src_buf, buf_state);
mtk_jpegenc_put_buf(cjpeg);
jpeg_buf_queue_dec(ctx);
+ pm_runtime_put(cjpeg->dev);
}

static irqreturn_t mtk_jpegenc_hw_irq_handler(int irq, void *priv)
@@ -316,12 +315,11 @@ static irqreturn_t mtk_jpegenc_hw_irq_handler(int irq, void *priv)
v4l2_m2m_buf_done(src_buf, buf_state);
mtk_jpegenc_put_buf(jpeg);
jpeg_buf_queue_dec(ctx);
- pm_runtime_put(ctx->jpeg->dev);
- clk_disable_unprepare(jpeg->venc_clk.clks->clk);

jpeg->hw_state = MTK_JPEG_HW_IDLE;
wake_up(&master_jpeg->hw_wq);
atomic_inc(&master_jpeg->hw_rdy);
+ pm_runtime_put(jpeg->dev);

return IRQ_HANDLED;
}
@@ -425,15 +423,84 @@ static int mtk_jpegenc_hw_probe(struct platform_device *pdev)

platform_set_drvdata(pdev, dev);
pm_runtime_enable(&pdev->dev);
+ ret = devm_clk_bulk_get(dev->dev,
+ jpegenc_clk->clk_num,
+ jpegenc_clk->clks);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to init clk\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static void mtk_jpeg_clk_on(struct mtk_jpegenc_comp_dev *jpeg)
+{
+ int ret;
+
+ ret = clk_bulk_prepare_enable(jpeg->venc_clk.clk_num,
+ jpeg->venc_clk.clks);
+ if (ret)
+ dev_err(jpeg->dev, "%s : %d, jpegenc clk_prepare_enable fail\n",
+ __func__, __LINE__);
+}
+
+static void mtk_jpeg_clk_off(struct mtk_jpegenc_comp_dev *jpeg)
+{
+ clk_bulk_disable_unprepare(jpeg->venc_clk.clk_num,
+ jpeg->venc_clk.clks);
+}
+
+static __maybe_unused int mtk_jpegenc_pm_suspend(struct device *dev)
+{
+ struct mtk_jpegenc_comp_dev *jpeg = dev_get_drvdata(dev);
+
+ mtk_jpeg_clk_off(jpeg);

return 0;
}

+static __maybe_unused int mtk_jpegenc_pm_resume(struct device *dev)
+{
+ struct mtk_jpegenc_comp_dev *jpeg = dev_get_drvdata(dev);
+
+ mtk_jpeg_clk_on(jpeg);
+
+ return 0;
+}
+
+static __maybe_unused int mtk_jpegenc_suspend(struct device *dev)
+{
+ struct mtk_jpegenc_comp_dev *jpeg = dev_get_drvdata(dev);
+
+ v4l2_m2m_suspend(jpeg->master_dev->m2m_dev);
+ return pm_runtime_force_suspend(dev);
+}
+
+static __maybe_unused int mtk_jpegenc_resume(struct device *dev)
+{
+ struct mtk_jpegenc_comp_dev *jpeg = dev_get_drvdata(dev);
+ int ret;
+
+ ret = pm_runtime_force_resume(dev);
+ if (ret < 0)
+ return ret;
+
+ v4l2_m2m_resume(jpeg->master_dev->m2m_dev);
+ return ret;
+}
+
+static const struct dev_pm_ops mtk_jpegenc_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(mtk_jpegenc_suspend, mtk_jpegenc_resume)
+ SET_RUNTIME_PM_OPS(mtk_jpegenc_pm_suspend, mtk_jpegenc_pm_resume, NULL)
+};
+
static struct platform_driver mtk_jpegenc_hw_driver = {
.probe = mtk_jpegenc_hw_probe,
.driver = {
.name = "mtk-jpegenc-hw",
.of_match_table = mtk_jpegenc_drv_ids,
+ .pm = &mtk_jpegenc_pm_ops,
},
};

--
2.46.0

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From: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
To: Hans Verkuil <hverkuil-cisco@xxxxxxxxx>, Mauro Carvalho Chehab
<mchehab@xxxxxxxxxx>, Rob Herring <robh@xxxxxxxxxx>, Krzysztof Kozlowski
<krzk+dt@xxxxxxxxxx>, Conor Dooley <conor+dt@xxxxxxxxxx>, Matthias Brugger
<matthias.bgg@xxxxxxxxx>, AngeloGioacchino Del Regno
<angelogioacchino.delregno@xxxxxxxxxxxxx>, Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>,
<linux-media@xxxxxxxxxxxxxxx>, <devicetree@xxxxxxxxxxxxxxx>,
<linux-kernel@xxxxxxxxxxxxxxx>, <linux-arm-kernel@xxxxxxxxxxxxxxxxxxx>,
<linux-mediatek@xxxxxxxxxxxxxxxxxxx>
CC: <srv_heupstream@xxxxxxxxxxxx>
Subject: [PATCH v5 07/12] media: mediatek: jpeg: refactor jpeg dst buffer layout
Date: Fri, 30 May 2025 15:45:32 +0800
Message-ID: <20250530074537.26338-8-kyrie.wu@xxxxxxxxxxxx>
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1. change dst buffer size to same as struct mtk_jpeg_src_buf
to make sure all params of mtk_jpeg_src_buf could get a memory.
2. For memory alloc operation:
the v4l2 framework malloc a memory, the base addr is vb2_buffer and
the size is sizeof(struct mtk_jpeg_src_buf), mtk_jpeg_src_buf could get
itself addr by container_of like that:
vb2_buffer -> vb2_v4l2_buffer -> mtk_jpeg_src_buf.
vb2_v4l2_buffer must keep on the top of mtk_jpeg_src_buf.

Signed-off-by: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx>
---
drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 2 +-
drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index 52d59bb5c9ad..7e3509be6f69 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
@@ -1103,7 +1103,7 @@ static int mtk_jpeg_queue_init(void *priv, struct vb2_queue *src_vq,
dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
dst_vq->io_modes = VB2_DMABUF | VB2_MMAP;
dst_vq->drv_priv = ctx;
- dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
+ dst_vq->buf_struct_size = sizeof(struct mtk_jpeg_src_buf);
dst_vq->ops = jpeg->variant->qops;
dst_vq->mem_ops = &vb2_dma_contig_memops;
dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h
index 655dc9c3280c..186cd1862028 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h
@@ -96,10 +96,10 @@ struct mtk_jpeg_variant {
};

struct mtk_jpeg_src_buf {
- u32 frame_num;
struct vb2_v4l2_buffer b;
struct list_head list;
u32 bs_size;
+ u32 frame_num;
struct mtk_jpeg_dec_param dec_param;

struct mtk_jpeg_ctx *curr_ctx;
--
2.46.0

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Date: Fri, 30 May 2025 08:46:19 +0100
From: "Russell King (Oracle)" <linux@xxxxxxxxxxxxxxx>
To: Romain Gantois <romain.gantois@xxxxxxxxxxx>
Cc: Maxime Chevallier <maxime.chevallier@xxxxxxxxxxx>, davem@xxxxxxxxxxxxx,
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=?iso-8859-1?Q?K=F6ry?= Maincent <kory.maincent@xxxxxxxxxxx>,
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Subject: Re: [PATCH net-next v6 06/14] net: phy: Introduce generic SFP
handling for PHY drivers
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On Fri, May 30, 2025 at 09:28:11AM +0200, Romain Gantois wrote:
> On Thursday, 29 May 2025 15:23:22 CEST Russell King (Oracle) wrote:
> > On Wed, May 28, 2025 at 09:35:35AM +0200, Romain Gantois wrote:
> > > > In that regard, you can consider 1000BaseX as a MII mode (we do have
> > > > PHY_INTERFACE_MODE_1000BASEX).
> > >
> > > Ugh, the "1000BaseX" terminology never ceases to confuse me, but yes
> > > you're
> > > right.
> >
> > 1000BASE-X is exactly what is described in IEEE 802.3. It's a PHY
> > interface mode because PHYs that use SerDes can connect to the host
> > using SGMII or 1000BASE-X over the serial link.
> >
> > 1000BASE-X's purpose in IEEE 802.3 is as a protocol for use over
> > fibre links, as the basis for 1000BASE-SX, 1000BASE-LX, 1000BASE-EX
> > etc where the S, L, E etc are all to do with the properties of the
> > medium that the electrical 1000BASE-X is sent over. It even includes
> > 1000BASE-CX which is over copper cable.
>
> Ah makes sense, thanks for the explanation. I guess my mistake was assuming
> that MAC/PHY interface modes were necessarily strictly at the reconciliation
> sublayer level, and didn't include PCS/PMA functions.

When a serdes protocol such as SGMII, 1000BASE-X, or 10GBASE-R is being
used with a PHY, the IEEE 802.3 setup isn't followed exactly - in
effect there are more layers.

On the SoC:

MAC
Reconciliation (RS)
PCS
SerDes (part of the PMA layer)

On the PHY side of the SerDes host-to-phy link:

SerDes
PCS (which may or may not be exposed in the PHY register set,
and is normally managed by the PHY itself)
(maybe other layers, could include MACs back-to-back)
PCS
PMA
PMD

Hope that helps explain what's going on a little more.

Another way to look at it is that with SGMII, 1000BASE-X etc between
the PHY and host, the PHY is a media converter.

--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!

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Date: Fri, 30 May 2025 09:50:25 +0200
From: Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= <ukleinek@xxxxxxxxxx>
To: Longbin Li <looong.bin@xxxxxxxxx>
Cc: Rob Herring <robh@xxxxxxxxxx>,
Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>, Conor Dooley <conor+dt@xxxxxxxxxx>,
Chen Wang <unicorn_wang@xxxxxxxxxxx>, Inochi Amaoto <inochiama@xxxxxxxxx>,
Paul Walmsley <paul.walmsley@xxxxxxxxxx>, Palmer Dabbelt <palmer@xxxxxxxxxxx>,
Albert Ou <aou@xxxxxxxxxxxxxxxxx>, Alexandre Ghiti <alex@xxxxxxxx>, linux-pwm@xxxxxxxxxxxxxxx,
devicetree@xxxxxxxxxxxxxxx, sophgo@xxxxxxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx,
linux-riscv@xxxxxxxxxxxxxxxxxxx
Subject: Re: [PATCH v5 3/3] pwm: sophgo: add driver for SG2044
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Subject: Re: [PATCH v5 3/3] pwm: sophgo: add driver for SG2044
MIME-Version: 1.0

Hello,

On Wed, May 28, 2025 at 06:11:38PM +0800, Longbin Li wrote:
> Add PWM controller for SG2044 on base of SG2042.
>=20
> Signed-off-by: Longbin Li <looong.bin@xxxxxxxxx>
> Reviewed-by: Chen Wang <unicorn_wang@xxxxxxxxxxx>
> Tested-by: Chen Wang <unicorn_wang@xxxxxxxxxxx>

Nitpick: Make your S-o-b line the last line. This way you document that
it was you who added the tags for Chen Wang.

> [...]
> +static int pwm_sg2044_apply(struct pwm_chip *chip, struct pwm_device *pw=
m,
> + const struct pwm_state *state)
> +{
> + struct sg2042_pwm_ddata *ddata =3D pwmchip_get_drvdata(chip);
> +
> + pwm_sg2044_set_polarity(ddata, pwm, state);
> +
> + pwm_sg2042_set_dutycycle(chip, pwm, state);
> +
> + /*
> + * re-enable PWMSTART to refresh the register period
> + */
> + pwm_sg2044_set_outputen(ddata, pwm, false);

I'm astonished that checkpatch doesn't spot the wrong indention here.

> +
> + if (!state->enabled)
> + return 0;
> +
> + pwm_sg2044_set_outputdir(ddata, pwm, true);
> + pwm_sg2044_set_outputen(ddata, pwm, true);
> +
> + return 0;
> +}
> +
> static const struct sg2042_chip_data sg2042_chip_data =3D {
> .ops =3D {
> .apply =3D pwm_sg2042_apply,
> @@ -142,11 +215,22 @@ static const struct sg2042_chip_data sg2042_chip_da=
ta =3D {
> }
> };
>=20
> +static const struct sg2042_chip_data sg2044_chip_data =3D {
> + .ops =3D {
> + .apply =3D pwm_sg2044_apply,
> + .get_state =3D pwm_sg2042_get_state,
> + }

Missing , after }.

If you're ok, I'll pick up this version and fixup the two code changes
and the order of the tags in the commit log.

Best regards
Uwe

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å?¨ 2025/5/30 13:21, Christian Brauner å??é??:
> On Thu, May 29, 2025 at 10:25:02AM +0800, Yangtao Li wrote:
>> +cc Christian Brauner
>>
>> å?¨ 2025/5/29 05:26, Viacheslav Dubeyko å??é??:
>>> On Wed, 2025-05-28 at 16:37 +0000, æ??æ?¬é?¬ wrote:
>>>> Hi Slava,
>>>>
>>>>> I am slightly confused by comment. Does it mean that the fix introduces more errors? It looks like we need to have more clear explanation of the fix here.
>>>>
>>>> I'll update commit msg.
>>>>
>>>>> s->s_flags |= SB_NODIRATIME | SB_NOATIME;
>>>>
>>>> IIUC, SB_NOATIME > SB_NODIRATIME.
>>>>
>>>
>>> Semantically, it's two different flags. One is responsible for files and another
>>> one is responsible for folders. So, this is why I believe it's more safe to have
>>> these both flags.
>>
>> To be honest, from my point of view, SB_NOATIME is more like disabling atime
>> updates for all types of files, not just files. I would like to know what
>> vfs people think, whether we need to use both flags at the same time.
>
> SB_NODIRATIME should be a subset of SB_NOATIME. So all you should need
> is SB_NOATIME to disable it for all files.

Thx to point itï¼?I think I'll correct the incorrect usage in other file
systems later.

MBRï¼?
Yangtao

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From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
Date: Fri, 30 May 2025 09:51:05 +0200
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Subject: Re: [PATCH] arm64: dts: Add no-hpd property for all ti-sn65dsi86
bridge consumers
To: Jayesh Choudhary <j-choudhary@xxxxxx>
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Hi Jayesh,

Thanks for your patch!

On Thu, 29 May 2025 at 13:24, Jayesh Choudhary <j-choudhary@xxxxxx> wrote:
> In the SN65DSI86 DSI-2-eDP bridge, HPD is not supported as of now.
> But DisplayPort connector_type usecases does need hpd to be enabled.
> In order not to break any platform from those driver changes, add
> "no-hpd" property to all the existing sn65dsi86 nodes (that don't
> have it already) as hpd is not being used there anyways.
>
> Signed-off-by: Jayesh Choudhary <j-choudhary@xxxxxx>

DT bindings day:

no-hpd:
type: boolean
description:
Set if the HPD line on the bridge isn't hooked up to anything or is
otherwise unusable.

On all Renesas platforms listed below, the DP bridge's HPD pin is wired
to the HPD pin on the mini-DP connector. What am I missing?

> Upcoming driver changes that will break platforms if we do not have this
> property in all the existing sn65dsi86 nodes that assumes hpd is disabled:
> <https://lore.kernel.org/all/20250529110418.481756-1-j-choudhary@xxxxxx/>

Breaking backwards-compatibility with existing DTBs is definitely a no-go.
I'll reply there, too...

> .../boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts | 1 +
> arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts | 1 +
> arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts | 1 +
> arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 1 +
> arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts | 1 +
> arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts | 1 +
> arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi | 1 +
> 7 files changed, 7 insertions(+)

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

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From: Paolo Bonzini <pbonzini@xxxxxxxxxx>
To: linux-kernel@xxxxxxxxxxxxxxx,
kvm@xxxxxxxxxxxxxxx
Cc: Randy Dunlap <rdunlap@xxxxxxxxxxxxx>,
Peter Zijlstra <peterz@xxxxxxxxxxxxx>
Subject: [PATCH] rtmutex_api: remove definition of mutex_lock_killable_nested
Date: Fri, 30 May 2025 03:51:36 -0400
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Commit fb49f07ba1d9 ("locking/mutex: implement mutex_lock_killable_nest_lock")
removed the "extern" declaration of mutex_lock_killable_nested from
include/linux/mutex.h, and replaced it with a macro since it could be
treated as a special case of _mutex_lock_killable. It also removed a
definition of the function in kernel/locking/mutex.c.

However, it left the definition in place in kernel/locking/rtmutex_api.c,
which causes a failure when building with CONFIG_RT_MUTEXES=y. Drop it as
well now.

Fixes: fb49f07ba1d9 ("locking/mutex: implement mutex_lock_killable_nest_lock")
Reported-by: Randy Dunlap <rdunlap@xxxxxxxxxxxxx>
Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
Signed-off-by: Paolo Bonzini <pbonzini@xxxxxxxxxx>
---
kernel/locking/rtmutex_api.c | 7 -------
1 file changed, 7 deletions(-)

diff --git a/kernel/locking/rtmutex_api.c b/kernel/locking/rtmutex_api.c
index 191e4720e546..0c26b52dd417 100644
--- a/kernel/locking/rtmutex_api.c
+++ b/kernel/locking/rtmutex_api.c
@@ -544,13 +544,6 @@ int __sched mutex_lock_interruptible_nested(struct mutex *lock,
}
EXPORT_SYMBOL_GPL(mutex_lock_interruptible_nested);

-int __sched mutex_lock_killable_nested(struct mutex *lock,
- unsigned int subclass)
-{
- return __mutex_lock_common(lock, TASK_KILLABLE, subclass, NULL, _RET_IP_);
-}
-EXPORT_SYMBOL_GPL(mutex_lock_killable_nested);
-
void __sched mutex_lock_io_nested(struct mutex *lock, unsigned int subclass)
{
int token;
--
2.43.5

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Subject: Re: linux-next: Tree for May 29 (kernel/locking/rtmutex_api.c)
To: Randy Dunlap <rdunlap@xxxxxxxxxxxxx>,
Stephen Rothwell <sfr@xxxxxxxxxxxxxxxx>,
Linux Next Mailing List <linux-next@xxxxxxxxxxxxxxx>
Cc: Linux Kernel Mailing List <linux-kernel@xxxxxxxxxxxxxxx>,
Peter Zijlstra <peterz@xxxxxxxxxxxxx>, Maxim Levitsky <mlevitsk@xxxxxxxxxx>
References: <20250529165801.6dcb3fcf@xxxxxxxxxxxxxxxx>
<2d9429d0-e76c-429b-80d4-780052e0907c@xxxxxxxxxxxxx>
From: Paolo Bonzini <pbonzini@xxxxxxxxxx>
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On 5/29/25 19:12, Randy Dunlap wrote:
>
>
> On 5/28/25 11:58 PM, Stephen Rothwell wrote:
>> Hi all,
>>
>> Changes since 20250528:
>>
>
> on x86_64 or i386:
>
>
> In file included from ../include/uapi/linux/posix_types.h:5,
> from ../include/uapi/linux/types.h:14,
> from ../include/linux/types.h:6,
> from ../include/linux/kasan-checks.h:5,
> from ../include/asm-generic/rwonce.h:26,
> from ./arch/x86/include/generated/asm/rwonce.h:1,
> from ../include/linux/compiler.h:390,
> from ../include/linux/export.h:5,
> from ../include/linux/linkage.h:7,
> from ../include/linux/preempt.h:10,
> from ../include/linux/spinlock.h:56,
> from ../kernel/locking/rtmutex_api.c:5:
> ../include/linux/stddef.h:8:14: error: expected declaration specifiers or â??...â?? before â??(â?? token
> 8 | #define NULL ((void *)0)
> | ^
> ../include/linux/mutex.h:183:46: note: in expansion of macro â??NULLâ??
> 183 | _mutex_lock_killable(lock, subclass, NULL)
> | ^~~~
> ../kernel/locking/rtmutex_api.c:547:13: note: in expansion of macro â??mutex_lock_killable_nestedâ??
> 547 | int __sched mutex_lock_killable_nested(struct mutex *lock,
> | ^~~~~~~~~~~~~~~~~~~~~~~~~~
> ../kernel/locking/rtmutex_api.c:552:19: error: â??mutex_lock_killable_nestedâ?? undeclared here (not in a function); did you mean â??mutex_lock_io_nestedâ???
> 552 | EXPORT_SYMBOL_GPL(mutex_lock_killable_nested);
> | ^~~~~~~~~~~~~~~~~~~~~~~~~~
> ../include/linux/export.h:76:23: note: in definition of macro â??__EXPORT_SYMBOLâ??
> 76 | extern typeof(sym) sym; \
> | ^~~
> ../include/linux/export.h:90:41: note: in expansion of macro â??_EXPORT_SYMBOLâ??
> 90 | #define EXPORT_SYMBOL_GPL(sym) _EXPORT_SYMBOL(sym, "GPL")
> | ^~~~~~~~~~~~~~
> ../kernel/locking/rtmutex_api.c:552:1: note: in expansion of macro â??EXPORT_SYMBOL_GPLâ??
> 552 | EXPORT_SYMBOL_GPL(mutex_lock_killable_nested);
> | ^~~~~~~~~~~~~~~~~
> ../include/linux/stddef.h:8:14: error: expected declaration specifiers or â??...â?? before â??(â?? token
> 8 | #define NULL ((void *)0)
> | ^
> ../include/linux/mutex.h:215:60: note: in expansion of macro â??NULLâ??
> 215 | #define mutex_trylock(lock) _mutex_trylock_nest_lock(lock, NULL)
> | ^~~~
> ../kernel/locking/rtmutex_api.c:596:13: note: in expansion of macro â??mutex_trylockâ??
> 596 | int __sched mutex_trylock(struct mutex *lock)
> | ^~~~~~~~~~~~~
> ../kernel/locking/rtmutex_api.c:609:15: error: â??mutex_trylockâ?? undeclared here (not in a function); did you mean â??ww_mutex_trylockâ???
> 609 | EXPORT_SYMBOL(mutex_trylock);
> | ^~~~~~~~~~~~~
> ../include/linux/export.h:76:23: note: in definition of macro â??__EXPORT_SYMBOLâ??
> 76 | extern typeof(sym) sym; \
> | ^~~
> ../include/linux/export.h:89:41: note: in expansion of macro â??_EXPORT_SYMBOLâ??
> 89 | #define EXPORT_SYMBOL(sym) _EXPORT_SYMBOL(sym, "")
> | ^~~~~~~~~~~~~~
> ../kernel/locking/rtmutex_api.c:609:1: note: in expansion of macro â??EXPORT_SYMBOLâ??
> 609 | EXPORT_SYMBOL(mutex_trylock);
> | ^~~~~~~~~~~~~
>
>
> This seems to be due to <linux/mutex.h> containing a #define for mutex_lock_killable_nested()
> when DEBUG_PAGE_ALLOC is set and another for when DEBUG_PAGE_ALLOC is not set.
> But then rtmutex_api.c has a function by that name also... (for the DEBUG_PAGE_ALLOC=y case,
> which is set in my failing randconfig file, which is attached).

Yep, the bad condition is CONFIG_DEBUG_PAGE_ALLOC=y + CONFIG_RT_MUTEXES=y.
Patch at https://lore.kernel.org/r/20250530075136.11842-1-pbonzini@xxxxxxxxxx.

Thanks for the report!

Paolo

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<aDh9LtSLCiTLjg2X@xxxxxxxxxxxxxxxxxxxx> <20250529211423.GA1271329@xxxxxxxxxxx>
In-Reply-To: <20250529211423.GA1271329@xxxxxxxxxxx>
From: Barry Song <21cnbao@xxxxxxxxx>
Date: Fri, 30 May 2025 19:52:28 +1200
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Subject: Re: [DISCUSSION] proposed mctl() API
To: Johannes Weiner <hannes@xxxxxxxxxxx>
Cc: Matthew Wilcox <willy@xxxxxxxxxxxxx>, Lorenzo Stoakes <lorenzo.stoakes@xxxxxxxxxx>,
Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>, Shakeel Butt <shakeel.butt@xxxxxxxxx>,
"Liam R . Howlett" <Liam.Howlett@xxxxxxxxxx>, David Hildenbrand <david@xxxxxxxxxx>,
Vlastimil Babka <vbabka@xxxxxxx>, Jann Horn <jannh@xxxxxxxxxx>, Arnd Bergmann <arnd@xxxxxxxx>,
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On Fri, May 30, 2025 at 9:14=E2=80=AFAM Johannes Weiner <hannes@xxxxxxxxxxx=
> wrote:
>
> On Thu, May 29, 2025 at 04:28:46PM +0100, Matthew Wilcox wrote:
> > Barry's problem is that we're all nervous about possibly regressing
> > performance on some unknown workloads. Just try Barry's proposal, see
> > if anyone actually compains or if we're just afraid of our own shadows.
>
> I actually explained why I think this is a terrible idea. But okay, I
> tried the patch anyway.
>
> This is 'git log' on a hot kernel repo after a large IO stream:
>
> VANILLA BARRY
> Real time 49.93 ( +0.00%) 60.36 ( +20.48%)
> User time 32.10 ( +0.00%) 32.09 ( -0.04%)
> System time 14.41 ( +0.00%) 14.64 ( +1.50%)
> pgmajfault 9227.00 ( +0.00%) 18390.00 ( +99.30%)
> workingset_refault_file 184.00 ( +0.00%) 236899.00 (+127954.05%)
>
> Clearly we can't generally ignore page cache hits just because the
> mmaps() are intermittent.

Hi Johannes,
Thanks!

Are you on v1, which lacks folio demotion[1], or v2, which includes it [2]?

[1] https://lore.kernel.org/linux-mm/20250412085852.48524-1-21cnbao@gmail.c=
om/
[2] https://lore.kernel.org/linux-mm/20250514070820.51793-1-21cnbao@gmail.c=
om/

>
> The whole point is to cache across processes and their various
> apertures into a common, long-lived filesystem space.
>
> Barry knows something about the relationship between certain processes
> and certain files that he could exploit with MADV_COLD-on-exit
> semantics. But that's not something the kernel can safely assume. Not
> without defeating the page cache for an entire class of file accesses.

Best Regards
Barry

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Date: Fri, 30 May 2025 10:54:30 +0300 (EEST)
To: Stuart Hayes <stuart.w.hayes@xxxxxxxxx>
cc: LKML <linux-kernel@xxxxxxxxxxxxxxx>, Hans de Goede <hdegoede@xxxxxxxxxx>,
platform-driver-x86@xxxxxxxxxxxxxxx
Subject: Re: [PATCH v3 2/4] platform/x86: dell_rbu: Fix list usage
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On Thu, 29 May 2025, Stuart Hayes wrote:

> Stop using an entire struct packet_data just for the embedded list_head,
> and fix usage of that list_head.
>
> Fixes: d19f359fbdc6 ("platform/x86: dell_rbu: don't open code list_for_each_entry*()")
> Signed-off-by: Stuart Hayes <stuart.w.hayes@xxxxxxxxx>

Isn't this just refactor so Fixes tag for this commit is not warranted?

> ---
> drivers/platform/x86/dell/dell_rbu.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/platform/x86/dell/dell_rbu.c b/drivers/platform/x86/dell/dell_rbu.c
> index 7b019fb72e86..c03d4d55fcc1 100644
> --- a/drivers/platform/x86/dell/dell_rbu.c
> +++ b/drivers/platform/x86/dell/dell_rbu.c
> @@ -77,14 +77,14 @@ struct packet_data {
> int ordernum;
> };
>
> -static struct packet_data packet_data_head;
> +static struct list_head packet_data_list;
>
> static struct platform_device *rbu_device;
> static int context;
>
> static void init_packet_head(void)
> {
> - INIT_LIST_HEAD(&packet_data_head.list);
> + INIT_LIST_HEAD(&packet_data_list);
> rbu_data.packet_read_count = 0;
> rbu_data.num_packets = 0;
> rbu_data.packetsize = 0;
> @@ -183,7 +183,7 @@ static int create_packet(void *data, size_t length) __must_hold(&rbu_data.lock)
>
> /* initialize the newly created packet headers */
> INIT_LIST_HEAD(&newpacket->list);
> - list_add_tail(&newpacket->list, &packet_data_head.list);
> + list_add_tail(&newpacket->list, &packet_data_list);
>
> memcpy(newpacket->data, data, length);
>
> @@ -292,7 +292,7 @@ static int packet_read_list(char *data, size_t * pread_length)
> remaining_bytes = *pread_length;
> bytes_read = rbu_data.packet_read_count;
>
> - list_for_each_entry(newpacket, (&packet_data_head.list)->next, list) {
> + list_for_each_entry(newpacket, &packet_data_list, list) {
> bytes_copied = do_packet_read(pdest, newpacket,
> remaining_bytes, bytes_read, &temp_count);
> remaining_bytes -= bytes_copied;
> @@ -315,7 +315,7 @@ static void packet_empty_list(void)
> {
> struct packet_data *newpacket, *tmp;
>
> - list_for_each_entry_safe(newpacket, tmp, (&packet_data_head.list)->next, list) {
> + list_for_each_entry_safe(newpacket, tmp, &packet_data_list, list) {
> list_del(&newpacket->list);
>
> /*
>

--
i.

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From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
Date: Fri, 30 May 2025 09:55:37 +0200
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Subject: Re: [PATCH v3] drm/bridge: ti-sn65dsi86: Add HPD for DisplayPort
connector type
To: Jayesh Choudhary <j-choudhary@xxxxxx>
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Hi Jayesh,

CC devicetree

On Fri, 30 May 2025 at 04:54, Jayesh Choudhary <j-choudhary@xxxxxx> wrote:
> On 29/05/25 16:34, Jayesh Choudhary wrote:
> > By default, HPD was disabled on SN65DSI86 bridge. When the driver was
> > added (commit "a095f15c00e27"), the HPD_DISABLE bit was set in pre-enable
> > call which was moved to other function calls subsequently.
> > Later on, commit "c312b0df3b13" added detect utility for DP mode. But with
> > HPD_DISABLE bit set, all the HPD events are disabled[0] and the debounced
> > state always return 1 (always connected state).
> >
> > Set HPD_DISABLE bit conditionally based on "no-hpd" property.
> > Since the HPD_STATE is reflected correctly only after waiting for debounce
> > time (~100-400ms) and adding this delay in detect() is not feasible
> > owing to the performace impact (glitches and frame drop), remove runtime
> > calls in detect() and add hpd_enable()/disable() bridge hooks with runtime
> > calls, to detect hpd properly without any delay.
> >
> > [0]: <https://www.ti.com/lit/gpn/SN65DSI86> (Pg. 32)
> >
> > Fixes: c312b0df3b13 ("drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP")
> > Cc: Max Krummenacher <max.krummenacher@xxxxxxxxxxx>
> > Signed-off-by: Jayesh Choudhary <j-choudhary@xxxxxx>
> > ---
> >
> > Changelog v2->v3:
> > - Change conditional based on no-hpd property to address [1]
> > - Remove runtime calls in detect() with appropriate comments
> > - Add hpd_enable() and hpd_disable() in drm_bridge_funcs
> > - Not picking up "Tested-by" tag as there are new changes
> >
> > v2 patch link:
> > <https://lore.kernel.org/all/20250508115433.449102-1-j-choudhary@xxxxxx/>
> >
> > [1]: <https://lore.kernel.org/all/mwh35anw57d6nvre3sguetzq3miu4kd43rokegvul7fk266lys@5h2euthpk7vq/>

Thanks for your patch!

> > This would also require dts changes in all the nodes of sn65dsi86
> > to ensure that they have no-hpd property.
>
> DTS patch is posted now:
> <https://lore.kernel.org/all/20250529112423.484232-1-j-choudhary@xxxxxx/>

On all Renesas platforms handled by that patch, the DP bridge's HPD pin
is wired to the HPD pin on the mini-DP connector. What am I missing?

Regardless, breaking backwards-compatibility with existing DTBs is
definitely a no-go.

> > drivers/gpu/drm/bridge/ti-sn65dsi86.c | 40 +++++++++++++++++++++++----
> > 1 file changed, 35 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> > index 60224f476e1d..e9ffc58acf58 100644
> > --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> > +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> > @@ -190,6 +190,7 @@ struct ti_sn65dsi86 {
> > u8 ln_assign;
> > u8 ln_polrs;
> > bool comms_enabled;
> > + bool no_hpd;
> > struct mutex comms_mutex;
> >
> > #if defined(CONFIG_OF_GPIO)
> > @@ -352,8 +353,10 @@ static void ti_sn65dsi86_enable_comms(struct ti_sn65dsi86 *pdata,
> > * change this to be conditional on someone specifying that HPD should
> > * be used.
> > */
> > - regmap_update_bits(pdata->regmap, SN_HPD_DISABLE_REG, HPD_DISABLE,
> > - HPD_DISABLE);
> > +
> > + if (pdata->no_hpd)
> > + regmap_update_bits(pdata->regmap, SN_HPD_DISABLE_REG, HPD_DISABLE,
> > + HPD_DISABLE);
> >
> > pdata->comms_enabled = true;
> >
> > @@ -1195,9 +1198,17 @@ static enum drm_connector_status ti_sn_bridge_detect(struct drm_bridge *bridge)
> > struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge);
> > int val = 0;
> >
> > - pm_runtime_get_sync(pdata->dev);
> > + /*
> > + * The chip won't report HPD right after being powered on as
> > + * HPD_DEBOUNCED_STATE reflects correct state only after the
> > + * debounce time (~100-400 ms).
> > + * So having pm_runtime_get_sync() and immediately reading
> > + * the register in detect() won't work, and adding delay()
> > + * in detect will have performace impact in display.
> > + * So remove runtime calls here.
> > + */
> > +
> > regmap_read(pdata->regmap, SN_HPD_DISABLE_REG, &val);
> > - pm_runtime_put_autosuspend(pdata->dev);
> >
> > return val & HPD_DEBOUNCED_STATE ? connector_status_connected
> > : connector_status_disconnected;
> > @@ -1220,6 +1231,20 @@ static void ti_sn65dsi86_debugfs_init(struct drm_bridge *bridge, struct dentry *
> > debugfs_create_file("status", 0600, debugfs, pdata, &status_fops);
> > }
> >
> > +static void ti_sn_bridge_hpd_enable(struct drm_bridge *bridge)
> > +{
> > + struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge);
> > +
> > + pm_runtime_get_sync(pdata->dev);
> > +}
> > +
> > +static void ti_sn_bridge_hpd_disable(struct drm_bridge *bridge)
> > +{
> > + struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge);
> > +
> > + pm_runtime_put_sync(pdata->dev);
> > +}
> > +
> > static const struct drm_bridge_funcs ti_sn_bridge_funcs = {
> > .attach = ti_sn_bridge_attach,
> > .detach = ti_sn_bridge_detach,
> > @@ -1234,6 +1259,8 @@ static const struct drm_bridge_funcs ti_sn_bridge_funcs = {
> > .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
> > .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
> > .debugfs_init = ti_sn65dsi86_debugfs_init,
> > + .hpd_enable = ti_sn_bridge_hpd_enable,
> > + .hpd_disable = ti_sn_bridge_hpd_disable,
> > };
> >
> > static void ti_sn_bridge_parse_lanes(struct ti_sn65dsi86 *pdata,
> > @@ -1322,7 +1349,8 @@ static int ti_sn_bridge_probe(struct auxiliary_device *adev,
> > ? DRM_MODE_CONNECTOR_DisplayPort : DRM_MODE_CONNECTOR_eDP;
> >
> > if (pdata->bridge.type == DRM_MODE_CONNECTOR_DisplayPort)
> > - pdata->bridge.ops = DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_DETECT;
> > + pdata->bridge.ops = DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_DETECT |
> > + DRM_BRIDGE_OP_HPD;
> >
> > drm_bridge_add(&pdata->bridge);
> >
> > @@ -1935,6 +1963,8 @@ static int ti_sn65dsi86_probe(struct i2c_client *client)
> > return dev_err_probe(dev, PTR_ERR(pdata->refclk),
> > "failed to get reference clock\n");
> >
> > + pdata->no_hpd = of_property_read_bool(dev->of_node, "no-hpd");
> > +
> > pm_runtime_enable(dev);
> > pm_runtime_set_autosuspend_delay(pdata->dev, 500);
> > pm_runtime_use_autosuspend(pdata->dev);

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

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Date: Fri, 30 May 2025 09:56:08 +0200
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On Thu, 29 May 2025 17:36:11 +0800
Jijie Shao <shaojijie@xxxxxxxxxx> wrote:

> on 2025/3/8 1:36, Maxime Chevallier wrote:
> > As the link_caps array is efficient for <speed,duplex> lookups,
> > implement a function for speed/duplex lookups that matches a given
> > mask. This replicates to some extent the phy_lookup_settings()
> > behaviour, matching full link_capabilities instead of a single linkmode.
> >
> > phy.c's phy_santize_settings() and phylink's
> > phylink_ethtool_ksettings_set() performs such lookup using the
> > phy_settings table, but are only interested in the actual speed/duplex
> > that were matched, rathet than the individual linkmode.
> >
> > Similar to phy_lookup_settings(), the newly introduced phy_caps_lookup()
> > will run through the link_caps[] array by descending speed/duplex order.
> >
> > If the link_capabilities for a given <speed/duplex> tuple intersects the
> > passed linkmodes, we consider that a match.
> >
> > Similar to phy_lookup_settings(), we also allow passing an 'exact'
> > boolean, allowing non-exact match. Here, we MUST always match the
> > linkmodes mask, but we allow matching on lower speed settings.
> >
> > Signed-off-by: Maxime Chevallier <maxime.chevallier@xxxxxxxxxxx>
> > ---
> > drivers/net/phy/phy-caps.h | 4 ++++
> > drivers/net/phy/phy.c | 32 ++++++--------------------
> > drivers/net/phy/phy_caps.c | 47 ++++++++++++++++++++++++++++++++++++++
> > drivers/net/phy/phylink.c | 17 +++++++-------
> > 4 files changed, 67 insertions(+), 33 deletions(-)
> >
> > diff --git a/drivers/net/phy/phy-caps.h b/drivers/net/phy/phy-caps.h
> > index 8833798f141f..aef4b54a8429 100644
> > --- a/drivers/net/phy/phy-caps.h
> > +++ b/drivers/net/phy/phy-caps.h
> > @@ -51,4 +51,8 @@ phy_caps_lookup_by_linkmode(const unsigned long *link=
modes);
> > const struct link_capabilities *
> > phy_caps_lookup_by_linkmode_rev(const unsigned long *linkmodes, bool =
fdx_only);
> > =20
> > +const struct link_capabilities *
> > +phy_caps_lookup(int speed, unsigned int duplex, const unsigned long *s=
upported,
> > + bool exact);
> > +
> > #endif /* __PHY_CAPS_H */
> > diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
> > index 8df37d221fba..562acde89224 100644
> > --- a/drivers/net/phy/phy.c
> > +++ b/drivers/net/phy/phy.c
> > @@ -213,25 +213,6 @@ int phy_aneg_done(struct phy_device *phydev)
> > }
> > EXPORT_SYMBOL(phy_aneg_done);
> > =20
> > -/**
> > - * phy_find_valid - find a PHY setting that matches the requested para=
meters
> > - * @speed: desired speed
> > - * @duplex: desired duplex
> > - * @supported: mask of supported link modes
> > - *
> > - * Locate a supported phy setting that is, in priority order:
> > - * - an exact match for the specified speed and duplex mode
> > - * - a match for the specified speed, or slower speed
> > - * - the slowest supported speed
> > - * Returns the matched phy_setting entry, or %NULL if no supported phy
> > - * settings were found.
> > - */
> > -static const struct phy_setting *
> > -phy_find_valid(int speed, int duplex, unsigned long *supported)
> > -{
> > - return phy_lookup_setting(speed, duplex, supported, false);
> > -}
> > -
> > /**
> > * phy_supported_speeds - return all speeds currently supported by a =
phy device
> > * @phy: The phy device to return supported speeds of.
> > @@ -274,13 +255,14 @@ EXPORT_SYMBOL(phy_check_valid);
> > */
> > static void phy_sanitize_settings(struct phy_device *phydev)
> > {
> > - const struct phy_setting *setting;
> > + const struct link_capabilities *c;
> > +
> > + c =3D phy_caps_lookup(phydev->speed, phydev->duplex, phydev->supporte=
d,
> > + false);
> > =20
> > - setting =3D phy_find_valid(phydev->speed, phydev->duplex,
> > - phydev->supported);
> > - if (setting) {
> > - phydev->speed =3D setting->speed;
> > - phydev->duplex =3D setting->duplex;
> > + if (c) {
> > + phydev->speed =3D c->speed;
> > + phydev->duplex =3D c->duplex;
> > } else {
> > /* We failed to find anything (no supported speeds?) */
> > phydev->speed =3D SPEED_UNKNOWN;
> > diff --git a/drivers/net/phy/phy_caps.c b/drivers/net/phy/phy_caps.c
> > index c39f38c12ef2..0366feee2912 100644
> > --- a/drivers/net/phy/phy_caps.c
> > +++ b/drivers/net/phy/phy_caps.c
> > @@ -170,6 +170,53 @@ phy_caps_lookup_by_linkmode_rev(const unsigned lon=
g *linkmodes, bool fdx_only)
> > return NULL;
> > }
> > =20
> > +/**
> > + * phy_caps_lookup() - Lookup capabilities by speed/duplex that matche=
s a mask
> > + * @speed: Speed to match
> > + * @duplex: Duplex to match
> > + * @supported: Mask of linkmodes to match
> > + * @exact: Perform an exact match or not.
> > + *
> > + * Lookup a link_capabilities entry that intersect the supported linkm=
odes mask,
> > + * and that matches the passed speed and duplex.
> > + *
> > + * When @exact is set, an exact match is performed on speed and duplex=
, meaning
> > + * that if the linkmodes for the given speed and duplex intersect the =
supported
> > + * mask, this capability is returned, otherwise we don't have a match =
and return
> > + * NULL.
> > + *
> > + * When @exact is not set, we return either an exact match, or matchin=
g capabilities
> > + * at lower speed, or the lowest matching speed, or NULL.
> > + *
> > + * Returns: a matched link_capabilities according to the above process=
, NULL
> > + * otherwise.
> > + */
> > +const struct link_capabilities *
> > +phy_caps_lookup(int speed, unsigned int duplex, const unsigned long *s=
upported,
> > + bool exact)
> > +{
> > + const struct link_capabilities *lcap, *last =3D NULL;
> > +
> > + for_each_link_caps_desc_speed(lcap) {
> > + if (linkmode_intersects(lcap->linkmodes, supported)) {
> > + last =3D lcap;
> > + /* exact match on speed and duplex*/
> > + if (lcap->speed =3D=3D speed && lcap->duplex =3D=3D duplex) {
> > + return lcap;
> > + } else if (!exact) {
> > + if (lcap->speed <=3D speed)
> > + return lcap;
> > + }
> > + }
> > + }
> > +
> > + if (!exact)
> > + return last;
> > +
> > + return NULL;
> > +}
> > +EXPORT_SYMBOL_GPL(phy_caps_lookup);
> > +
> > /**
> > * phy_caps_linkmode_max_speed() - Clamp a linkmodes set to a max spe=
ed
> > * @max_speed: Speed limit for the linkmode set
> > diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
> > index a3f64b6d2d34..cf9f019382ad 100644
> > --- a/drivers/net/phy/phylink.c
> > +++ b/drivers/net/phy/phylink.c
> > @@ -20,6 +20,7 @@
> > #include <linux/timer.h>
> > #include <linux/workqueue.h>
> > =20
> > +#include "phy-caps.h"
> > #include "sfp.h"
> > #include "swphy.h"
> > =20
> > @@ -2852,8 +2853,8 @@ int phylink_ethtool_ksettings_set(struct phylink =
*pl,
> > const struct ethtool_link_ksettings *kset)
> > {
> > __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
> > + const struct link_capabilities *c;
> > struct phylink_link_state config;
> > - const struct phy_setting *s;
> > =20
> > ASSERT_RTNL();
> > =20
> > @@ -2896,23 +2897,23 @@ int phylink_ethtool_ksettings_set(struct phylin=
k *pl,
> > /* Autonegotiation disabled, select a suitable speed and
> > * duplex.
> > */
> > - s =3D phy_lookup_setting(kset->base.speed, kset->base.duplex,
> > - pl->supported, false);
> > - if (!s)
> > + c =3D phy_caps_lookup(kset->base.speed, kset->base.duplex,
> > + pl->supported, false);
> > + if (!c)
> > return -EINVAL; =20
>=20
>=20
>=20
> Hi Maxime, fc81e257d19f ("net: phy: phy_caps: Allow looking-up link caps=
based on speed and duplex") might have different behavior than the modific=
ation.
> My case is set 10M Half with disable autoneg both sides and I expect it is
> link in 10M Half. But now, it is link in 10M Full=EF=BC=8Cwhich is not wh=
at I
> expect.
>=20
> I used followed command and trace how phy worked.
> ethtool -s eth1 autoneg off speed 10 duplex half
> The log is showed as followed:
> ethtool-13127 [067] 6164.771853: phy_ethtool_ksettings set: (phy_ethtool =
ksettings set+0x0/0x200) duplex=3D0 speed=3D10
> kworker/u322:2-11096 [070] 6164.771853: _phy_start_aneq: ( _phy_start_ane=
g+0x0/0xb8) duplex=3D0 speed=3D10
> kworker/u322:2-11096 [070] 6164.771854: phy_caps_lookup: (phy_caps_lookup=
+0x0/0xf0) duplex=3D0 speed=3D10
> kworker/u322:2-11096 [070] 6164.771855: phy_config_aneg: (phy_config_aneg=
+0x0/0x70) duplex=3D1 speed=3D10
> kworker/u322:2-11096 [070] 6164.771856: genphy_config_aneg: (__genphy_con=
fig_aneg+0X0/0X270) duplex=3D1 speed=3D10
>=20
> I also try to fixed it and it works. Do you have any idea about it.

The !exact match logic in the rework is wrong indeed, sorry...

For non-exact matches we return a non-exact match too early without
giving the chance for a potentially exact half-duplex match...

As for the fix, can you try this out :

diff --git a/drivers/net/phy/phy_caps.c b/drivers/net/phy/phy_caps.c
index 703321689726..d80f6a37edf1 100644
--- a/drivers/net/phy/phy_caps.c
+++ b/drivers/net/phy/phy_caps.c
@@ -195,7 +195,7 @@ const struct link_capabilities *
phy_caps_lookup(int speed, unsigned int duplex, const unsigned long *suppo=
rted,
bool exact)
{
- const struct link_capabilities *lcap, *last =3D NULL;
+ const struct link_capabilities *lcap, *match =3D NULL, *last =3D NULL;
=20
for_each_link_caps_desc_speed(lcap) {
if (linkmode_intersects(lcap->linkmodes, supported)) {
@@ -204,16 +204,19 @@ phy_caps_lookup(int speed, unsigned int duplex, const=
unsigned long *supported,
if (lcap->speed =3D=3D speed && lcap->duplex =3D=3D duplex) {
return lcap;
} else if (!exact) {
- if (lcap->speed <=3D speed)
- return lcap;
+ if (!match && lcap->speed <=3D speed)
+ match =3D lcap;
+
+ if (lcap->speed < speed)
+ break;
}
}
}
=20
- if (!exact)
- return last;
+ if (!match && !exact)
+ match =3D last;
=20
- return NULL;
+ return match;
}
EXPORT_SYMBOL_GPL(phy_caps_lookup);

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Date: Fri, 30 May 2025 09:56:32 +0200
From: Jacopo Mondi <jacopo.mondi@xxxxxxxxxxxxxxxx>
To: Krzysztof =?utf-8?Q?Ha=C5=82asa?= <khalasa@xxxxxxx>,
Xavier Roumegue <xavier.roumegue@xxxxxxxxxxx>
Cc: Jacopo Mondi <jacopo.mondi@xxxxxxxxxxxxxxxx>,
Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>, Rui Miguel Silva <rmfrfs@xxxxxxxxx>,
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Mauro Carvalho Chehab <mchehab@xxxxxxxxxx>, Shawn Guo <shawnguo@xxxxxxxxxx>,
Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>, Pengutronix Kernel Team <kernel@xxxxxxxxxxxxxx>,
Fabio Estevam <festevam@xxxxxxxxx>, linux-media@xxxxxxxxxxxxxxx, imx@xxxxxxxxxxxxxxx,
linux-arm-kernel@xxxxxxxxxxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx
Subject: Re: [PATCH] Enable MIPI filtering by DT on i.MX8M*
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Hi Krzysztof
thanks for the detailed analysis

On Thu, May 29, 2025 at 01:27:56PM +0200, Krzysztof HaÅ?asa wrote:
> Hi Jacopo,
>
> Jacopo Mondi <jacopo.mondi@xxxxxxxxxxxxxxxx> writes:
>
> >> - 10 User Defined 8-bit Data Type 8 packets, line-sized, DT=0x37, called
> >> apparently "Vertical OB" by Sony datasheet
> >
> > These are optically black pixels and should probably be discarded by
> > the gasket as well as embedded data ?
>
> Yes, apparently.
>
> >> I hope I got this right, this is straight from oscilloscope (only
> >> checked IDs on IMX462, will confirm IMX290 later but it looks the same).
> >> In 1280x1080p25 mode there are 4 (not 10) "vertical OB" packets, and 720
> >> RGGB lines instead of 1080.
> >
> > Is this correct ? you ask for 1280x1080 and get back 720 lines ?
>
> Well, no, I just checked both modes and these are the differences.
> IOW, nothing unexpected. Wrong copy & paste or so.
>
> >> IMX462 produces just a tiny 2-pixel dot in the left top corner, possibly
> >> shifting some data to the right (I remember it did that, but I can't
> >> observe it now - could be a kernel (driver) version change?).
> >
> > What are those two pixels ? Does the datasheet describes them ?
>
> Nope, I guess it's a silicon bug. It corrupts 3 RAW-12 pixels, though
> (32 bits > 2 * 12 bits).
>
> >> 32EC0138h 2D8000h ISP Dewarp Control Register (ISP_DEWARP_CONTROL)
> >> ISP ID mode 0, ISP1: DT 0h (unknown), ISP2: DT 2Ch (RAW12) left-just mode
> >
> > But this other register has (again) one other filtering option and
> > reading the value here it is set to filter RAW12 (mipi_isp2_data_type)
> >
> > Weirdly enough, I don't see this register being programmed in the
> > mainline gasket driver...
>
> I guess it's drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c:
>
> static int rkisp1_gasket_enable(struct rkisp1_device *rkisp1,
> struct media_pad *source)
> {
> ...
> regmap_update_bits(rkisp1->gasket, ISP_DEWARP_CONTROL, mask, val);

Ah indeed, thanks!

>
> Now this register doesn't filter data: if you set it with a different
> value, the data still goes through. It's just processed differently.
> For example, my sensor is 12-bit (in addition to 10-bit). If I set
> ISP_DEWARP_CONTROL to 0xB68 (or 0x368) meaning RAW 14-bit, the image
> only gets darker - ISP thinks it's getting 14-bit samples.

Thanks for testing

>
> The only filtering (while using ISP) is, apparently, in the ISP
> Configuration Register (MIPI_CSIS_ISPCONFIG_CH0) and subsequently in its
> shadow counterpart. And it somehow may be enabled in CSIS Common Control
> Register (MIPI_CSIS_CMN_CTRL). But if you don't enable it there, the
> data is still filtered (e.g. wrong value in MIPI_CSIS_ISPCONFIG_CH0
> prevents data flow). The filtering is only needed for preventing pixel
> corruption (these 3 pixels).

Let me recap all of this.

With:

- MIPI_CSIx_CSIS_COMMON_CTRL[11:10]
"Select Interleave mode" = 0x00 = CH0 only, no data interleave

- MIPI_CSIx_ISP_CONFIGn[7:2]
"Image Data Format" = 0x2c = RAW12

Embedded data and OB pixels are filtered (which means we're filtering
on DT even if MIPI_CSIx_CSIS_COMMON_CTRL[11:10] = 0x0x would suggest
filtering is not enabled)

However corrupted pixels are still sent through.

If you

- MIPI_CSIx_CSIS_COMMON_CTRL[11:10]
"Select Interleave mode" = 0x01 = DT (Data type) only

Embedded data and OB pixels are still filtered, and your corrupt
pixels are filtered as well.

Now, why are "corrupted pixels" filtered away by enabling this option ?

As far as I understand bad pixels are corrupt in their data values,
the CSI-2 packet header which contains the DT is correct. Is my
understanding correct ?

>
> So it means, for at least i.MX8MP, the DT filtering bit in
> MIPI_CSIS_CMN_CTRL should always be enabled.

It would be nice to actually understand what it does before enabling
it unconditionally.

I've cc-ed Xavier from NXP which maybe can help shed some light on
that register function ?

Thanks for the investigation

>
> >> MIPI_CSI2:
> >> 32E50004h 4705h CSIS Common Control Register (MIPI_CSIS_CMN_CTRL)
> >
> > Do you mean 0x14705 ? I'm asking because Shadow Crtl is BIT(16). Surprisingly
> > BIT(14) is marked as reserved in the datasheet version I have
>
> No, it's 0x4705 (usually).
> With 0xFF05 (resulting from write with 0xfffffffd) it's still working
> correctly (with DT filtering). Write 0xfffffbfd (= no DT filtering) and
> the magic light pixels in the left top corner reappear. So it means the
> INTERLEAVE_MODE bits (11 and 10) are probably two independent bits, with
> bit 11 probably not used at all.
>
>
> In my copy (i.MX 8M Plus Applications Processor Reference Manual, Rev.
> 1, 06/2021), CSIS Common Control Register (MIPI_CSIx_CSIS_COMMON_CTRL):
> - bits 31-17, 15, 13, 12, 7-2 are zero and reserved (though bits 12 and
> 2 are additionally marked "This read-only field is reserved and always
> has the value 0")
> - bit 14 is reserved and shown as "1"
> - bit 16 is "UPDATE_SHADOW", and it clears itself after a write (unless
> the pipeline locks up or something alike)
> - bits 11 and 10 are "INTERLEAVE_MODE":
> Select Interleave mode
> ISP Configuration register of CH# is used for data interleave.
> 00 CH0 only, no data interleave
> 01 DT (Data type) only
> 10 Reserved
> 11 Reserved
> - bits 9 and 8 are LANE_NUMBER, 0 to 3 means 1 to 4.
> - bit 1 is SW_RESET
> - bit 0 is CSI_EN
>
> In fact, bit 2 does not "always have the value 0", it's set to 1. Both
> bits 14 and 2 can be reset to 0, though (without apparent change in the
> image).
> --
> Krzysztof "Chris" HaÅ?asa
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Subject: [PATCH v3 1/3] hfsplus: fix to update ctime after rename
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[BUG]
$ sudo ./check generic/003
FSTYP -- hfsplus
PLATFORM -- Linux/x86_64 graphic 6.8.0-58-generic #60~22.04.1-Ubuntu
MKFS_OPTIONS -- /dev/loop29
MOUNT_OPTIONS -- /dev/loop29 /mnt/scratch

generic/003 - output mismatch
--- tests/generic/003.out 2025-04-27 08:49:39.876945323 -0600
+++ /home/graphic/fs/xfstests-dev/results//generic/003.out.bad

QA output created by 003
+ERROR: change time has not been updated after changing file1
Silence is golden
...

Ran: generic/003
Failures: generic/003
Failed 1 of 1 tests

[CAUSE]
change time has not been updated after changing file1

[FIX]
Update file ctime after rename in hfsplus_rename().

Signed-off-by: Yangtao Li <frank.li@xxxxxxxx>
Tested-by: Viacheslav Dubeyko <slava@xxxxxxxxxxx>
Reviewed-by: Viacheslav Dubeyko <slava@xxxxxxxxxxx>
---
fs/hfsplus/dir.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/fs/hfsplus/dir.c b/fs/hfsplus/dir.c
index 876bbb80fb4d..e77942440240 100644
--- a/fs/hfsplus/dir.c
+++ b/fs/hfsplus/dir.c
@@ -534,6 +534,7 @@ static int hfsplus_rename(struct mnt_idmap *idmap,
struct inode *new_dir, struct dentry *new_dentry,
unsigned int flags)
{
+ struct inode *inode = d_inode(old_dentry);
int res;

if (flags & ~RENAME_NOREPLACE)
@@ -552,9 +553,13 @@ static int hfsplus_rename(struct mnt_idmap *idmap,
res = hfsplus_rename_cat((u32)(unsigned long)old_dentry->d_fsdata,
old_dir, &old_dentry->d_name,
new_dir, &new_dentry->d_name);
- if (!res)
- new_dentry->d_fsdata = old_dentry->d_fsdata;
- return res;
+ if (res)
+ return res;
+
+ new_dentry->d_fsdata = old_dentry->d_fsdata;
+ inode_set_ctime_current(inode);
+ mark_inode_dirty(inode);
+ return 0;
}

const struct inode_operations hfsplus_dir_inode_operations = {
--
2.48.1

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From: Yangtao Li <frank.li@xxxxxxxx>
To: slava@xxxxxxxxxxx,
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Yangtao Li <frank.li@xxxxxxxx>
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Subject: [PATCH v3 2/3] hfs: correct superblock flags
Date: Fri, 30 May 2025 02:17:17 -0600
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We don't support atime updates of any kind,
because hfs actually does not have atime.

dirCrDat: LongInt; {date and time of creation}
dirMdDat: LongInt; {date and time of last modification}
dirBkDat: LongInt; {date and time of last backup}

filCrDat: LongInt; {date and time of creation}
filMdDat: LongInt; {date and time of last modification}
filBkDat: LongInt; {date and time of last backup}

Signed-off-by: Yangtao Li <frank.li@xxxxxxxx>
---
fs/hfs/super.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/hfs/super.c b/fs/hfs/super.c
index fe09c2093a93..9fab84b157b4 100644
--- a/fs/hfs/super.c
+++ b/fs/hfs/super.c
@@ -331,7 +331,7 @@ static int hfs_fill_super(struct super_block *sb, struct fs_context *fc)
sbi->sb = sb;
sb->s_op = &hfs_super_operations;
sb->s_xattr = hfs_xattr_handlers;
- sb->s_flags |= SB_NODIRATIME;
+ sb->s_flags |= SB_NOATIME;
mutex_init(&sbi->bitmap_lock);

res = hfs_mdb_get(sb);
--
2.48.1

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Subject: [PATCH v3 3/3] hfs: fix to update ctime after rename
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Similar to hfsplus, let's update file ctime after the rename operation
in hfs_rename().

W/O patch(xfstest generic/003):

+ERROR: access time has not been updated after accessing file1 first time
+ERROR: access time has not been updated after accessing file2
+ERROR: access time has changed after modifying file1
+ERROR: change time has not been updated after changing file1
+ERROR: access time has not been updated after accessing file3 second time
+ERROR: access time has not been updated after accessing file3 third time

W/ patch(xfstest generic/003):

+ERROR: access time has not been updated after accessing file1 first time
+ERROR: access time has not been updated after accessing file2
+ERROR: access time has changed after modifying file1
+ERROR: access time has not been updated after accessing file3 second time
+ERROR: access time has not been updated after accessing file3 third time

Signed-off-by: Yangtao Li <frank.li@xxxxxxxx>
---
fs/hfs/dir.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/fs/hfs/dir.c b/fs/hfs/dir.c
index 86a6b317b474..756ea7b895e2 100644
--- a/fs/hfs/dir.c
+++ b/fs/hfs/dir.c
@@ -284,6 +284,7 @@ static int hfs_rename(struct mnt_idmap *idmap, struct inode *old_dir,
struct dentry *old_dentry, struct inode *new_dir,
struct dentry *new_dentry, unsigned int flags)
{
+ struct inode *inode = d_inode(old_dentry);
int res;

if (flags & ~RENAME_NOREPLACE)
@@ -296,14 +297,16 @@ static int hfs_rename(struct mnt_idmap *idmap, struct inode *old_dir,
return res;
}

- res = hfs_cat_move(d_inode(old_dentry)->i_ino,
- old_dir, &old_dentry->d_name,
+ res = hfs_cat_move(inode->i_ino, old_dir, &old_dentry->d_name,
new_dir, &new_dentry->d_name);
- if (!res)
- hfs_cat_build_key(old_dir->i_sb,
- (btree_key *)&HFS_I(d_inode(old_dentry))->cat_key,
- new_dir->i_ino, &new_dentry->d_name);
- return res;
+ if (res)
+ return res;
+
+ hfs_cat_build_key(old_dir->i_sb, (btree_key *)&HFS_I(inode)->cat_key,
+ new_dir->i_ino, &new_dentry->d_name);
+ inode_set_ctime_current(inode);
+ mark_inode_dirty(inode);
+ return 0;
}

const struct file_operations hfs_dir_operations = {
--
2.48.1

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From: Ryan Roberts <ryan.roberts@xxxxxxx>
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On 29/05/2025 21:52, Yang Shi wrote:
>>>>>>> The split_mapping() guarantees keep block mapping if it is fully
>>>>>>> contained in
>>>>>>> the range between start and end, this is my series's responsibility. I know
>>>>>>> the
>>>>>>> current code calls apply_to_page_range() to apply permission change and it
>>>>>>> just
>>>>>>> does it on PTE basis. So IIUC Dev's series will modify it or provide a new
>>>>>>> API,
>>>>>>> then __change_memory_common() will call it to change permission. There
>>>>>>> should be
>>>>>>> some overlap between mine and Dev's, but I don't see strong dependency.
>>>>>> But if you have a block mapping in the region you are calling
>>>>>> __change_memory_common() on, today that will fail because it can only handle
>>>>>> page mappings.
>>>>> IMHO letting __change_memory_common() manipulate on contiguous address
>>>>> range is
>>>>> another story and should be not a part of the split primitive.
>>>> I 100% agree that it should not be part of the split primitive.
>>>>
>>>> But your series *depends* upon __change_memory_common() being able to change
>>>> permissions on block mappings. Today it can only change permissions on page
>>>> mappings.
>>> I don't think split primitive depends on it. Changing permission on block
>>> mappings is just the user of the new split primitive IMHO. We just have no real
>>> user right now.
>> But your series introduces a real user; after your series, the linear map is
>> block mapped.
>
> The users of the split primitive are the permission changers, for example,
> module, bpf, secret mem, etc.

Ahh, perhaps this is the crux of our misunderstanding... In my model, the split
primitive is called from __change_memory_common() (or from other appropriate
functions in pageattr.c). It's an implementation detail for arm64 and is not
exposed to common code. arm64 knows that it can split live mappings in a
transparent way so it uses huge pages eagerly and splits on demand.

I personally wouldn't want to be relying on the memory user knowing it needs to
split the mappings...

>
>>
>> Anyway, I think we are talking past eachother. Let's continue the conversation
>> in the context of your next version of the code.
>
> Yeah, sure.
>
> Thanks,
> Yang
>
>>
>>>> Your original v1 series solved this by splitting *all* of the mappings in a
>>>> given range to page mappings before calling __change_memory_common(), right?
>>> Yes, but if the range is contiguous, the new split primitive doesn't have to
>>> split to page mappings.
>>>
>>>> Remember it's not just vmalloc areas that are passed to
>>>> __change_memory_common(); virtually contiguous linear map regions can be passed
>>>> in as well. See (for example) set_direct_map_invalid_noflush(),
>>>> set_direct_map_default_noflush(), set_direct_map_valid_noflush(),
>>>> __kernel_map_pages(), realm_set_memory_encrypted(),
>>>> realm_set_memory_decrypted().
>>> Yes, no matter who the caller is, as long as the caller passes in contiguous
>>> address range, the split primitive can keep block mappings.
>>>
>>>>
>>>>> For example, we need to use vmalloc_huge() instead of vmalloc() to allocate
>>>>> huge
>>>>> memory, then does:
>>>>> split_mapping(start, start+HPAGE_PMD_SIZE);
>>>>> change_permission(start, start+HPAGE_PMD_SIZE);
>>>>>
>>>>> The split primitive will guarantee (start, start+HPAGE_PMD_SIZE) is kept as
>>>>> PMD
>>>>> mapping so that change_permission() can change it on PMD basis too.
>>>>>
>>>>> But this requires other kernel subsystems, for example, module, to allocate
>>>>> huge
>>>>> memory with proper APIs, for example, vmalloc_huge().
>>>> The longer term plan is to have vmalloc() always allocate using the
>>>> VM_ALLOW_HUGE_VMAP flag on systems that support BBML2. So there will be no need
>>>> to migrate users to vmalloc_huge(). We will just detect if we can split live
>>>> mappings safely and use huge mappings in that case.
>>> Anyway this is the potential user of the new split primitive.
>>>
>>> Thanks,
>>> Yang
>>>
>>>> Thanks,
>>>> Ryan
>>>>
>>>>> Thanks,
>>>>> Yang
>>>>>
>>>>>>>> Regarding the linear map repainting, I had a chat with Catalin, and he
>>>>>>>> reminded
>>>>>>>> me of a potential problem; if you are doing the repainting with the machine
>>>>>>>> stopped, you can't allocate memory at that point; it's possible a CPU was
>>>>>>>> inside
>>>>>>>> the allocator when it stopped. And I think you need to allocate
>>>>>>>> intermediate
>>>>>>>> pgtables, right? Do you have a solution to that problem? I guess one
>>>>>>>> approach
>>>>>>>> would be to figure out how much memory you will need and pre-allocate
>>>>>>>> prior to
>>>>>>>> stoping the machine?
>>>>>>> OK, I don't remember we discussed this problem before. I think we can do
>>>>>>> something like what kpti does. When creating the linear map we know how
>>>>>>> many PUD
>>>>>>> and PMD mappings are created, we can record the number, it will tell how
>>>>>>> many
>>>>>>> pages we need for repainting the linear map.
>>>>>> I saw a separate reply you sent for this. I'll read that and respond in that
>>>>>> context.
>>>>>>
>>>>>> Thanks,
>>>>>> Ryan
>>>>>>
>>>>>>>>> So I plan to post v4 patches to the mailing list. We can focus on
>>>>>>>>> reviewing
>>>>>>>>> the
>>>>>>>>> split primitive and linear map repainting. Does it sound good to you?
>>>>>>>> That works assuming you have a solution for the above.
>>>>>>> I think the only missing part is preallocating page tables for repainting. I
>>>>>>> will add this, then post the new spin to the mailing list.
>>>>>>>
>>>>>>> Thanks,
>>>>>>> Yang
>>>>>>>
>>>>>>>> Thanks,
>>>>>>>> Ryan
>>>>>>>>
>>>>>>>>> Thanks,
>>>>>>>>> Yang
>>>>>>>>>
>>>>>>>>>
>>>>>>>>> On 5/7/25 2:16 PM, Yang Shi wrote:
>>>>>>>>>> On 5/7/25 12:58 AM, Ryan Roberts wrote:
>>>>>>>>>>> On 05/05/2025 22:39, Yang Shi wrote:
>>>>>>>>>>>> On 5/2/25 4:51 AM, Ryan Roberts wrote:
>>>>>>>>>>>>> On 14/04/2025 22:24, Yang Shi wrote:
>>>>>>>>>>>>>> On 4/14/25 6:03 AM, Ryan Roberts wrote:
>>>>>>>>>>>>>>> On 10/04/2025 23:00, Yang Shi wrote:
>>>>>>>>>>>>>>>> Hi Ryan,
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> I know you may have a lot of things to follow up after LSF/MM. Just
>>>>>>>>>>>>>>>> gently
>>>>>>>>>>>>>>>> ping,
>>>>>>>>>>>>>>>> hopefully we can resume the review soon.
>>>>>>>>>>>>>>> Hi, I'm out on holiday at the moment, returning on the 22nd
>>>>>>>>>>>>>>> April. But
>>>>>>>>>>>>>>> I'm very
>>>>>>>>>>>>>>> keen to move this series forward so will come back to you next week.
>>>>>>>>>>>>>>> (although
>>>>>>>>>>>>>>> TBH, I thought I was waiting for you to respond to me... :-| )
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>> FWIW, having thought about it a bit more, I think some of the
>>>>>>>>>>>>>>> suggestions I
>>>>>>>>>>>>>>> previously made may not have been quite right, but I'll elaborate
>>>>>>>>>>>>>>> next
>>>>>>>>>>>>>>> week.
>>>>>>>>>>>>>>> I'm
>>>>>>>>>>>>>>> keen to build a pgtable splitting primitive here that we can reuse
>>>>>>>>>>>>>>> with
>>>>>>>>>>>>>>> vmalloc
>>>>>>>>>>>>>>> as well to enable huge mappings by default with vmalloc too.
>>>>>>>>>>>>>> Sounds good. I think the patches can support splitting vmalloc page
>>>>>>>>>>>>>> table
>>>>>>>>>>>>>> too.
>>>>>>>>>>>>>> Anyway we can discuss more after you are back. Enjoy your holiday.
>>>>>>>>>>>>> Hi Yang,
>>>>>>>>>>>>>
>>>>>>>>>>>>> Sorry I've taken so long to get back to you. Here's what I'm currently
>>>>>>>>>>>>> thinking:
>>>>>>>>>>>>> I'd eventually like to get to the point where the linear map and most
>>>>>>>>>>>>> vmalloc
>>>>>>>>>>>>> memory is mapped using the largest possible mapping granularity (i.e.
>>>>>>>>>>>>> block
>>>>>>>>>>>>> mappings at PUD/PMD, and contiguous mappings at PMD/PTE level).
>>>>>>>>>>>>>
>>>>>>>>>>>>> vmalloc has history with trying to do huge mappings by default; it
>>>>>>>>>>>>> ended up
>>>>>>>>>>>>> having to be turned into an opt-in feature (instead of the original
>>>>>>>>>>>>> opt-out
>>>>>>>>>>>>> approach) because there were problems with some parts of the kernel
>>>>>>>>>>>>> expecting
>>>>>>>>>>>>> page mappings. I think we might be able to overcome those issues on
>>>>>>>>>>>>> arm64
>>>>>>>>>>>>> with
>>>>>>>>>>>>> BBML2.
>>>>>>>>>>>>>
>>>>>>>>>>>>> arm64 can already support vmalloc PUD and PMD block mappings, and I
>>>>>>>>>>>>> have a
>>>>>>>>>>>>> series (that should make v6.16) that enables contiguous PTE
>>>>>>>>>>>>> mappings in
>>>>>>>>>>>>> vmalloc
>>>>>>>>>>>>> too. But these are currently limited to when VM_ALLOW_HUGE is
>>>>>>>>>>>>> specified.
>>>>>>>>>>>>> To be
>>>>>>>>>>>>> able to use that by default, we need to be able to change
>>>>>>>>>>>>> permissions on
>>>>>>>>>>>>> sub-regions of an allocation, which is where BBML2 and your series
>>>>>>>>>>>>> come
>>>>>>>>>>>>> in.
>>>>>>>>>>>>> (there may be other things we need to solve as well; TBD).
>>>>>>>>>>>>>
>>>>>>>>>>>>> I think the key thing we need is a function that can take a page-
>>>>>>>>>>>>> aligned
>>>>>>>>>>>>> kernel
>>>>>>>>>>>>> VA, will walk to the leaf entry for that VA and if the VA is in the
>>>>>>>>>>>>> middle of
>>>>>>>>>>>>> the leaf entry, it will split it so that the VA is now on a boundary.
>>>>>>>>>>>>> This
>>>>>>>>>>>>> will
>>>>>>>>>>>>> work for PUD/PMD block entries and contiguous-PMD/contiguous-PTE
>>>>>>>>>>>>> entries.
>>>>>>>>>>>>> The
>>>>>>>>>>>>> function can assume BBML2 is present. And it will return 0 on
>>>>>>>>>>>>> success, -
>>>>>>>>>>>>> EINVAL
>>>>>>>>>>>>> if the VA is not mapped or -ENOMEM if it couldn't allocate a
>>>>>>>>>>>>> pgtable to
>>>>>>>>>>>>> perform
>>>>>>>>>>>>> the split.
>>>>>>>>>>>> OK, the v3 patches already handled page table allocation failure with
>>>>>>>>>>>> returning
>>>>>>>>>>>> -ENOMEM and BUG_ON if it is not mapped because kernel assumes linear
>>>>>>>>>>>> mapping
>>>>>>>>>>>> should be always present. It is easy to return -EINVAL instead of
>>>>>>>>>>>> BUG_ON.
>>>>>>>>>>>> However I'm wondering what usecases you are thinking about? Splitting
>>>>>>>>>>>> vmalloc
>>>>>>>>>>>> area may run into unmapped VA?
>>>>>>>>>>> I don't think BUG_ON is the right behaviour; crashing the kernel
>>>>>>>>>>> should be
>>>>>>>>>>> discouraged. I think even for vmalloc under correct conditions we
>>>>>>>>>>> shouldn't
>>>>>>>>>>> see
>>>>>>>>>>> any unmapped VA. But vmalloc does handle it gracefully today; see (e.g.)
>>>>>>>>>>> vunmap_pmd_range() which skips the pmd if its none.
>>>>>>>>>>>
>>>>>>>>>>>>> Then we can use that primitive on the start and end address of any
>>>>>>>>>>>>> range for
>>>>>>>>>>>>> which we need exact mapping boundaries (e.g. when changing
>>>>>>>>>>>>> permissions on
>>>>>>>>>>>>> part
>>>>>>>>>>>>> of linear map or vmalloc allocation, when freeing part of a vmalloc
>>>>>>>>>>>>> allocation,
>>>>>>>>>>>>> etc). This way we only split enough to ensure the boundaries are
>>>>>>>>>>>>> precise,
>>>>>>>>>>>>> and
>>>>>>>>>>>>> keep larger mappings inside the range.
>>>>>>>>>>>> Yeah, makes sense to me.
>>>>>>>>>>>>
>>>>>>>>>>>>> Next we need to reimplement __change_memory_common() to not use
>>>>>>>>>>>>> apply_to_page_range(), because that assumes page mappings only. Dev
>>>>>>>>>>>>> Jain has
>>>>>>>>>>>>> been working on a series that converts this to use
>>>>>>>>>>>>> walk_page_range_novma() so
>>>>>>>>>>>>> that we can change permissions on the block/contig entries too.
>>>>>>>>>>>>> That's not
>>>>>>>>>>>>> posted publicly yet, but it's not huge so I'll ask if he is
>>>>>>>>>>>>> comfortable
>>>>>>>>>>>>> with
>>>>>>>>>>>>> posting an RFC early next week.
>>>>>>>>>>>> OK, so the new __change_memory_common() will change the permission of
>>>>>>>>>>>> page
>>>>>>>>>>>> table, right?
>>>>>>>>>>> It will change permissions of all the leaf entries in the range of VAs
>>>>>>>>>>> it is
>>>>>>>>>>> passed. Currently it assumes that all the leaf entries are PTEs. But we
>>>>>>>>>>> will
>>>>>>>>>>> generalize to support all the other types of leaf entries too.,
>>>>>>>>>>>
>>>>>>>>>>>> If I remember correctly, you suggested change permissions in
>>>>>>>>>>>> __create_pgd_mapping_locked() for v3. So I can disregard it?
>>>>>>>>>>> Yes I did. I think this made sense (in my head at least) because in the
>>>>>>>>>>> context
>>>>>>>>>>> of the linear map, all the PFNs are contiguous so it kind-of makes
>>>>>>>>>>> sense to
>>>>>>>>>>> reuse that infrastructure. But it doesn't generalize to vmalloc because
>>>>>>>>>>> vmalloc
>>>>>>>>>>> PFNs are not contiguous. So for that reason, I think it's preferable to
>>>>>>>>>>> have an
>>>>>>>>>>> independent capability.
>>>>>>>>>> OK, sounds good to me.
>>>>>>>>>>
>>>>>>>>>>>> The current code assumes the address range passed in by
>>>>>>>>>>>> change_memory_common()
>>>>>>>>>>>> is *NOT* physically contiguous so __change_memory_common() handles page
>>>>>>>>>>>> table
>>>>>>>>>>>> permission on page basis. I'm supposed Dev's patches will handle this
>>>>>>>>>>>> then my
>>>>>>>>>>>> patch can safely assume the linear mapping address range for
>>>>>>>>>>>> splitting is
>>>>>>>>>>>> physically contiguous too otherwise I can't keep large mappings inside
>>>>>>>>>>>> the
>>>>>>>>>>>> range. Splitting vmalloc area doesn't need to worry about this.
>>>>>>>>>>> I'm not sure I fully understand the point you're making here...
>>>>>>>>>>>
>>>>>>>>>>> Dev's series aims to use walk_page_range_novma() similar to riscv's
>>>>>>>>>>> implementation so that it can walk a VA range and update the
>>>>>>>>>>> permissions on
>>>>>>>>>>> each
>>>>>>>>>>> leaf entry it visits, regadless of which level the leaf entry is at.
>>>>>>>>>>> This
>>>>>>>>>>> doesn't make any assumption of the physical contiguity of neighbouring
>>>>>>>>>>> leaf
>>>>>>>>>>> entries in the page table.
>>>>>>>>>>>
>>>>>>>>>>> So if we are changing permissions on the linear map, we have a range of
>>>>>>>>>>> VAs to
>>>>>>>>>>> walk and convert all the leaf entries, regardless of their size. The
>>>>>>>>>>> same
>>>>>>>>>>> goes
>>>>>>>>>>> for vmalloc... But for vmalloc, we will also want to change the
>>>>>>>>>>> underlying
>>>>>>>>>>> permissions in the linear map, so we will have to figure out the
>>>>>>>>>>> contiguous
>>>>>>>>>>> pieces of the linear map and call __change_memory_common() for each;
>>>>>>>>>>> there is
>>>>>>>>>>> definitely some detail to work out there!
>>>>>>>>>> Yes, this is my point. When changing underlying linear map permission for
>>>>>>>>>> vmalloc, the linear map address may be not contiguous. This is why
>>>>>>>>>> change_memory_common() calls __change_memory_common() on page basis.
>>>>>>>>>>
>>>>>>>>>> But how Dev's patch work should have no impact on how I implement the
>>>>>>>>>> split
>>>>>>>>>> primitive by thinking it further. It should be the caller's
>>>>>>>>>> responsibility to
>>>>>>>>>> make sure __create_pgd_mapping_locked() is called for contiguous
>>>>>>>>>> linear map
>>>>>>>>>> address range.
>>>>>>>>>>
>>>>>>>>>>>>> You'll still need to repaint the whole linear map with page mappings
>>>>>>>>>>>>> for the
>>>>>>>>>>>>> case !BBML2 case, but I'm hoping __create_pgd_mapping_locked()
>>>>>>>>>>>>> (potentially
>>>>>>>>>>>>> with
>>>>>>>>>>>>> minor modifications?) can do that repainting on the live mappings;
>>>>>>>>>>>>> similar to
>>>>>>>>>>>>> how you are doing it in v3.
>>>>>>>>>>>> Yes, when repainting I need to split the page table all the way down
>>>>>>>>>>>> to PTE
>>>>>>>>>>>> level. A simple flag should be good enough to tell
>>>>>>>>>>>> __create_pgd_mapping_locked()
>>>>>>>>>>>> do the right thing off the top of my head.
>>>>>>>>>>> Perhaps it may be sufficient to reuse the NO_BLOCK_MAPPINGS and
>>>>>>>>>>> NO_CONT_MAPPINGS
>>>>>>>>>>> flags? For example, if you are find a leaf mapping and
>>>>>>>>>>> NO_BLOCK_MAPPINGS is
>>>>>>>>>>> set,
>>>>>>>>>>> then you need to split it?
>>>>>>>>>> Yeah, sounds feasible. Anyway I will figure it out.
>>>>>>>>>>
>>>>>>>>>>>>> Miko's BBML2 series should hopefully get imminently queued for v6.16.
>>>>>>>>>>>> Great! Anyway my series is based on his advertising BBML2 patch.
>>>>>>>>>>>>
>>>>>>>>>>>>> So in summary, what I'm asking for your large block mapping the
>>>>>>>>>>>>> linear map
>>>>>>>>>>>>> series is:
>>>>>>>>>>>>> Â Â Â Â Â Â Â - Paint linear map using blocks/contig if boot CPU supports
>>>>>>>>>>>>> BBML2
>>>>>>>>>>>>> Â Â Â Â Â Â Â - Repaint linear map using page mappings if secondary CPUs
>>>>>>>>>>>>> don't
>>>>>>>>>>>>> support BBML2
>>>>>>>>>>>> OK, I just need to add some simple tweak to split down to PTE level to
>>>>>>>>>>>> v3.
>>>>>>>>>>>>
>>>>>>>>>>>>> Â Â Â Â Â Â Â - Integrate Dev's __change_memory_common() series
>>>>>>>>>>>> OK, I think I have to do my patches on top of it. Because Dev's patch
>>>>>>>>>>>> need
>>>>>>>>>>>> guarantee the linear mapping address range is physically contiguous.
>>>>>>>>>>>>
>>>>>>>>>>>>> Â Â Â Â Â Â Â - Create primitive to ensure mapping entry boundary at a given
>>>>>>>>>>>>> page-
>>>>>>>>>>>>> aligned VA
>>>>>>>>>>>>> Â Â Â Â Â Â Â - Use primitive when changing permissions on linear map region
>>>>>>>>>>>> Sure.
>>>>>>>>>>>>
>>>>>>>>>>>>> This will be mergable on its own, but will also provide a great
>>>>>>>>>>>>> starting
>>>>>>>>>>>>> base
>>>>>>>>>>>>> for adding huge-vmalloc-by-default.
>>>>>>>>>>>>>
>>>>>>>>>>>>> What do you think?
>>>>>>>>>>>> Definitely makes sense to me.
>>>>>>>>>>>>
>>>>>>>>>>>> If I remember correctly, we still have some unsolved comments/questions
>>>>>>>>>>>> for v3
>>>>>>>>>>>> in my replies on March 17, particularly:
>>>>>>>>>>>> https://lore.kernel.org/linux-arm-kernel/2b715836-b566-4a9e-
>>>>>>>>>>>> b344-9401fa4c0feb@xxxxxxxxxxxxxxxxxxxxxx/
>>>>>>>>>>> Ahh sorry about that. I'll take a look now...
>>>>>>>>>> No problem.
>>>>>>>>>>
>>>>>>>>>> Thanks,
>>>>>>>>>> Yang
>>>>>>>>>>
>>>>>>>>>>> Thanks,
>>>>>>>>>>> Ryan
>>>>>>>>>>>
>>>>>>>>>>>> Thanks,
>>>>>>>>>>>> Yang
>>>>>>>>>>>>
>>>>>>>>>>>>> Thanks,
>>>>>>>>>>>>> Ryan
>>>>>>>>>>>>>
>>>>>>>>>>>>>
>>>>>>>>>>>>>> Thanks,
>>>>>>>>>>>>>> Yang
>>>>>>>>>>>>>>
>>>>>>>>>>>>>>> Thanks,
>>>>>>>>>>>>>>> Ryan
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> Thanks,
>>>>>>>>>>>>>>>> Yang
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> On 3/13/25 10:40 AM, Yang Shi wrote:
>>>>>>>>>>>>>>>>> On 3/13/25 10:36 AM, Ryan Roberts wrote:
>>>>>>>>>>>>>>>>>> On 13/03/2025 17:28, Yang Shi wrote:
>>>>>>>>>>>>>>>>>>> Hi Ryan,
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> I saw Miko posted a new spin of his patches. There are some
>>>>>>>>>>>>>>>>>>> slight
>>>>>>>>>>>>>>>>>>> changes
>>>>>>>>>>>>>>>>>>> that
>>>>>>>>>>>>>>>>>>> have impact to my patches (basically check the new boot
>>>>>>>>>>>>>>>>>>> parameter).
>>>>>>>>>>>>>>>>>>> Do you
>>>>>>>>>>>>>>>>>>> prefer I rebase my patches on top of his new spin right now then
>>>>>>>>>>>>>>>>>>> restart
>>>>>>>>>>>>>>>>>>> review
>>>>>>>>>>>>>>>>>>> from the new spin or review the current patches then solve
>>>>>>>>>>>>>>>>>>> the new
>>>>>>>>>>>>>>>>>>> review
>>>>>>>>>>>>>>>>>>> comments and rebase to Miko's new spin together?
>>>>>>>>>>>>>>>>>> Hi Yang,
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Sorry I haven't got to reviewing this version yet, it's in my
>>>>>>>>>>>>>>>>>> queue!
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> I'm happy to review against v3 as it is. I'm familiar with Miko's
>>>>>>>>>>>>>>>>>> series
>>>>>>>>>>>>>>>>>> and am
>>>>>>>>>>>>>>>>>> not too bothered about the integration with that; I think it's
>>>>>>>>>>>>>>>>>> pretty
>>>>>>>>>>>>>>>>>> straight
>>>>>>>>>>>>>>>>>> forward. I'm more interested in how you are handling the
>>>>>>>>>>>>>>>>>> splitting,
>>>>>>>>>>>>>>>>>> which I
>>>>>>>>>>>>>>>>>> think is the bulk of the effort.
>>>>>>>>>>>>>>>>> Yeah, sure, thank you.
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> I'm hoping to get to this next week before heading out to LSF/MM
>>>>>>>>>>>>>>>>>> the
>>>>>>>>>>>>>>>>>> following
>>>>>>>>>>>>>>>>>> week (might I see you there?)
>>>>>>>>>>>>>>>>> Unfortunately I can't make it this year. Have a fun!
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> Thanks,
>>>>>>>>>>>>>>>>> Yang
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Thanks,
>>>>>>>>>>>>>>>>>> Ryan
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> Thanks,
>>>>>>>>>>>>>>>>>>> Yang
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> On 3/4/25 2:19 PM, Yang Shi wrote:
>>>>>>>>>>>>>>>>>>>> Changelog
>>>>>>>>>>>>>>>>>>>> =========
>>>>>>>>>>>>>>>>>>>> v3:
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â * Rebased to v6.14-rc4.
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â * Based on Miko's BBML2 cpufeature patch (https://
>>>>>>>>>>>>>>>>>>>> lore.kernel.org/
>>>>>>>>>>>>>>>>>>>> linux-
>>>>>>>>>>>>>>>>>>>> arm-kernel/20250228182403.6269-3-miko.lenczewski@xxxxxxx/).
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â Also included in this series in order to have the
>>>>>>>>>>>>>>>>>>>> complete
>>>>>>>>>>>>>>>>>>>> patchset.
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â * Enhanced __create_pgd_mapping() to handle split as
>>>>>>>>>>>>>>>>>>>> well per
>>>>>>>>>>>>>>>>>>>> Ryan.
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â * Supported CONT mappings per Ryan.
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â * Supported asymmetric system by splitting kernel
>>>>>>>>>>>>>>>>>>>> linear
>>>>>>>>>>>>>>>>>>>> mapping if
>>>>>>>>>>>>>>>>>>>> such
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â system is detected per Ryan. I don't have such
>>>>>>>>>>>>>>>>>>>> system to
>>>>>>>>>>>>>>>>>>>> test,
>>>>>>>>>>>>>>>>>>>> so the
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â testing is done by hacking kernel to call linear
>>>>>>>>>>>>>>>>>>>> mapping
>>>>>>>>>>>>>>>>>>>> repainting
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â unconditionally. The linear mapping doesn't
>>>>>>>>>>>>>>>>>>>> have any
>>>>>>>>>>>>>>>>>>>> block and
>>>>>>>>>>>>>>>>>>>> cont
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â mappings after booting.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> RFC v2:
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â * Used allowlist to advertise BBM lv2 on the CPUs
>>>>>>>>>>>>>>>>>>>> which
>>>>>>>>>>>>>>>>>>>> can
>>>>>>>>>>>>>>>>>>>> handle TLB
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â conflict gracefully per Will Deacon
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â * Rebased onto v6.13-rc5
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â * https://lore.kernel.org/linux-arm-
>>>>>>>>>>>>>>>>>>>> kernel/20250103011822.1257189-1-
>>>>>>>>>>>>>>>>>>>> yang@xxxxxxxxxxxxxxxxxxxxxx/
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> RFC v1: https://lore.kernel.org/lkml/20241118181711.962576-1-
>>>>>>>>>>>>>>>>>>>> yang@xxxxxxxxxxxxxxxxxxxxxx/
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> Description
>>>>>>>>>>>>>>>>>>>> ===========
>>>>>>>>>>>>>>>>>>>> When rodata=full kernel linear mapping is mapped by PTE due to
>>>>>>>>>>>>>>>>>>>> arm's
>>>>>>>>>>>>>>>>>>>> break-before-make rule.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> A number of performance issues arise when the kernel linear
>>>>>>>>>>>>>>>>>>>> map is
>>>>>>>>>>>>>>>>>>>> using
>>>>>>>>>>>>>>>>>>>> PTE entries due to arm's break-before-make rule:
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â - performance degradation
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â - more TLB pressure
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â - memory waste for kernel page table
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> These issues can be avoided by specifying rodata=on the kernel
>>>>>>>>>>>>>>>>>>>> command
>>>>>>>>>>>>>>>>>>>> line but this disables the alias checks on page table
>>>>>>>>>>>>>>>>>>>> permissions and
>>>>>>>>>>>>>>>>>>>> therefore compromises security somewhat.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> With FEAT_BBM level 2 support it is no longer necessary to
>>>>>>>>>>>>>>>>>>>> invalidate the
>>>>>>>>>>>>>>>>>>>> page table entry when changing page sizes. This allows the
>>>>>>>>>>>>>>>>>>>> kernel to
>>>>>>>>>>>>>>>>>>>> split large mappings after boot is complete.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> This patch adds support for splitting large mappings when
>>>>>>>>>>>>>>>>>>>> FEAT_BBM
>>>>>>>>>>>>>>>>>>>> level 2
>>>>>>>>>>>>>>>>>>>> is available and rodata=full is used. This functionality
>>>>>>>>>>>>>>>>>>>> will be
>>>>>>>>>>>>>>>>>>>> used
>>>>>>>>>>>>>>>>>>>> when modifying page permissions for individual page frames.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> Without FEAT_BBM level 2 we will keep the kernel linear map
>>>>>>>>>>>>>>>>>>>> using
>>>>>>>>>>>>>>>>>>>> PTEs
>>>>>>>>>>>>>>>>>>>> only.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> If the system is asymmetric, the kernel linear mapping may be
>>>>>>>>>>>>>>>>>>>> repainted
>>>>>>>>>>>>>>>>>>>> once
>>>>>>>>>>>>>>>>>>>> the BBML2 capability is finalized on all CPUs.Â See patch #6
>>>>>>>>>>>>>>>>>>>> for
>>>>>>>>>>>>>>>>>>>> more
>>>>>>>>>>>>>>>>>>>> details.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> We saw significant performance increases in some benchmarks
>>>>>>>>>>>>>>>>>>>> with
>>>>>>>>>>>>>>>>>>>> rodata=full without compromising the security features of the
>>>>>>>>>>>>>>>>>>>> kernel.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> Testing
>>>>>>>>>>>>>>>>>>>> =======
>>>>>>>>>>>>>>>>>>>> The test was done on AmpereOne machine (192 cores, 1P) with
>>>>>>>>>>>>>>>>>>>> 256GB
>>>>>>>>>>>>>>>>>>>> memory and
>>>>>>>>>>>>>>>>>>>> 4K page size + 48 bit VA.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> Function test (4K/16K/64K page size)
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â - Kernel boot.Â Kernel needs change kernel linear
>>>>>>>>>>>>>>>>>>>> mapping
>>>>>>>>>>>>>>>>>>>> permission at
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â boot stage, if the patch didn't work, kernel
>>>>>>>>>>>>>>>>>>>> typically
>>>>>>>>>>>>>>>>>>>> didn't
>>>>>>>>>>>>>>>>>>>> boot.
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â - Module stress from stress-ng. Kernel module load
>>>>>>>>>>>>>>>>>>>> change
>>>>>>>>>>>>>>>>>>>> permission
>>>>>>>>>>>>>>>>>>>> for
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â linear mapping.
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â - A test kernel module which allocates 80% of total
>>>>>>>>>>>>>>>>>>>> memory
>>>>>>>>>>>>>>>>>>>> via
>>>>>>>>>>>>>>>>>>>> vmalloc(),
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â then change the vmalloc area permission to RO,
>>>>>>>>>>>>>>>>>>>> this also
>>>>>>>>>>>>>>>>>>>> change
>>>>>>>>>>>>>>>>>>>> linear
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â mapping permission to RO, then change it back
>>>>>>>>>>>>>>>>>>>> before
>>>>>>>>>>>>>>>>>>>> vfree(). Then
>>>>>>>>>>>>>>>>>>>> launch
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â a VM which consumes almost all physical memory.
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â - VM with the patchset applied in guest kernel too.
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â - Kernel build in VM with guest kernel which has
>>>>>>>>>>>>>>>>>>>> this
>>>>>>>>>>>>>>>>>>>> series
>>>>>>>>>>>>>>>>>>>> applied.
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â - rodata=on. Make sure other rodata mode is not
>>>>>>>>>>>>>>>>>>>> broken.
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â - Boot on the machine which doesn't support BBML2.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> Performance
>>>>>>>>>>>>>>>>>>>> ===========
>>>>>>>>>>>>>>>>>>>> Memory consumption
>>>>>>>>>>>>>>>>>>>> Before:
>>>>>>>>>>>>>>>>>>>> MemTotal:Â Â Â Â Â Â 258988984 kB
>>>>>>>>>>>>>>>>>>>> MemFree:Â Â Â Â Â Â Â 254821700 kB
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> After:
>>>>>>>>>>>>>>>>>>>> MemTotal:Â Â Â Â Â Â 259505132 kB
>>>>>>>>>>>>>>>>>>>> MemFree:Â Â Â Â Â Â Â 255410264 kB
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> Around 500MB more memory are free to use.Â The larger the
>>>>>>>>>>>>>>>>>>>> machine,
>>>>>>>>>>>>>>>>>>>> the
>>>>>>>>>>>>>>>>>>>> more memory saved.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> Performance benchmarking
>>>>>>>>>>>>>>>>>>>> * Memcached
>>>>>>>>>>>>>>>>>>>> We saw performance degradation when running Memcached benchmark
>>>>>>>>>>>>>>>>>>>> with
>>>>>>>>>>>>>>>>>>>> rodata=full vs rodata=on.Â Our profiling pointed to kernel TLB
>>>>>>>>>>>>>>>>>>>> pressure.
>>>>>>>>>>>>>>>>>>>> With this patchset we saw ops/sec is increased by around 3.5%,
>>>>>>>>>>>>>>>>>>>> P99
>>>>>>>>>>>>>>>>>>>> latency is reduced by around 9.6%.
>>>>>>>>>>>>>>>>>>>> The gain mainly came from reduced kernel TLB misses.Â The
>>>>>>>>>>>>>>>>>>>> kernel
>>>>>>>>>>>>>>>>>>>> TLB
>>>>>>>>>>>>>>>>>>>> MPKI is reduced by 28.5%.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> The benchmark data is now on par with rodata=on too.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> * Disk encryption (dm-crypt) benchmark
>>>>>>>>>>>>>>>>>>>> Ran fio benchmark with the below command on a 128G ramdisk
>>>>>>>>>>>>>>>>>>>> (ext4)
>>>>>>>>>>>>>>>>>>>> with
>>>>>>>>>>>>>>>>>>>> disk
>>>>>>>>>>>>>>>>>>>> encryption (by dm-crypt).
>>>>>>>>>>>>>>>>>>>> fio --directory=/data --random_generator=lfsr --norandommap --
>>>>>>>>>>>>>>>>>>>> randrepeat 1 \
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â --status-interval=999 --rw=write --bs=4k --
>>>>>>>>>>>>>>>>>>>> loops=1 --
>>>>>>>>>>>>>>>>>>>> ioengine=sync \
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â --iodepth=1 --numjobs=1 --fsync_on_close=1 --
>>>>>>>>>>>>>>>>>>>> group_reporting --
>>>>>>>>>>>>>>>>>>>> thread \
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â --name=iops-test-job --eta-newline=1 --size 100G
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> The IOPS is increased by 90% - 150% (the variance is high, but
>>>>>>>>>>>>>>>>>>>> the
>>>>>>>>>>>>>>>>>>>> worst
>>>>>>>>>>>>>>>>>>>> number of good case is around 90% more than the best number of
>>>>>>>>>>>>>>>>>>>> bad
>>>>>>>>>>>>>>>>>>>> case).
>>>>>>>>>>>>>>>>>>>> The bandwidth is increased and the avg clat is reduced
>>>>>>>>>>>>>>>>>>>> proportionally.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> * Sequential file read
>>>>>>>>>>>>>>>>>>>> Read 100G file sequentially on XFS (xfs_io read with page cache
>>>>>>>>>>>>>>>>>>>> populated).
>>>>>>>>>>>>>>>>>>>> The bandwidth is increased by 150%.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> MikoÅ?aj Lenczewski (1):
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â Â Â arm64: Add BBM Level 2 cpu feature
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> Yang Shi (5):
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â Â Â arm64: cpufeature: add AmpereOne to BBML2 allow
>>>>>>>>>>>>>>>>>>>> list
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â Â Â arm64: mm: make __create_pgd_mapping() and
>>>>>>>>>>>>>>>>>>>> helpers
>>>>>>>>>>>>>>>>>>>> non-void
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â Â Â arm64: mm: support large block mapping when
>>>>>>>>>>>>>>>>>>>> rodata=full
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â Â Â arm64: mm: support split CONT mappings
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â Â Â Â Â Â arm64: mm: split linear mapping if BBML2 is not
>>>>>>>>>>>>>>>>>>>> supported on
>>>>>>>>>>>>>>>>>>>> secondary
>>>>>>>>>>>>>>>>>>>> CPUs
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â arch/arm64/KconfigÂ Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â | 11 +++++
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â arch/arm64/include/asm/cpucaps.hÂ Â Â | 2 +
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â arch/arm64/include/asm/cpufeature.h | 15 ++++++
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â arch/arm64/include/asm/mmu.hÂ Â Â Â Â Â Â | 4 ++
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â arch/arm64/include/asm/pgtable.hÂ Â Â | 12 ++++-
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â arch/arm64/kernel/cpufeature.cÂ Â Â Â Â | 95 ++++++++++++
>>>>>>>>>>>>>>>>>>>> ++++++
>>>>>>>>>>>>>>>>>>>> ++++++
>>>>>>>>>>>>>>>>>>>> ++++++
>>>>>>>>>>>>>>>>>>>> +++++++
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â arch/arm64/mm/mmu.cÂ Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â | 397 ++++++++
>>>>>>>>>>>>>>>>>>>> ++++++
>>>>>>>>>>>>>>>>>>>> ++++++
>>>>>>>>>>>>>>>>>>>> ++++
>>>>>>>>>>>>>>>>>>>> ++++++
>>>>>>>>>>>>>>>>>>>> ++++
>>>>>>>>>>>>>>>>>>>> ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
>>>>>>>>>>>>>>>>>>>> ++++
>>>>>>>>>>>>>>>>>>>> ++++
>>>>>>>>>>>>>>>>>>>> +++++
>>>>>>>>>>>>>>>>>>>> +++++
>>>>>>>>>>>>>>>>>>>> ++++++++++++++++++++++-------------------
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â arch/arm64/mm/pageattr.cÂ Â Â Â Â Â Â Â Â Â Â | 37 +++++++++
>>>>>>>>>>>>>>>>>>>> +++---
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â arch/arm64/tools/cpucapsÂ Â Â Â Â Â Â Â Â Â Â | 1 +
>>>>>>>>>>>>>>>>>>>> Â Â Â Â Â Â Â Â Â 9 files changed, 518 insertions(+), 56 deletions(-)
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>>
>

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Subject: Re: [PATCH v3 3/4] platform/x86: dell_rbu: Stop overwriting data
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On Thu, 29 May 2025, Stuart Hayes wrote:

> The dell_rbu driver will use memset() to clear the data held by each
> packet when it is no longer needed (when the driver is unloaded, the
> packet size is changed, etc).
>
> The amount of memory that is cleared (before this patch) is the normal
> packet size. However, the last packet in the list may be smaller.
>
> Fix this to only clear the memory actually used by each packet, to prevent
> it from writing past the end of data buffer.
>
> Signed-off-by: Stuart Hayes <stuart.w.hayes@xxxxxxxxx>

This still doesn't have Fixes tag? If it writes part the buffer, there
certainly should be one in this one. Did you perhaps add it to a wrong
patch?

> ---
> drivers/platform/x86/dell/dell_rbu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/platform/x86/dell/dell_rbu.c b/drivers/platform/x86/dell/dell_rbu.c
> index c03d4d55fcc1..7d5b26735a20 100644
> --- a/drivers/platform/x86/dell/dell_rbu.c
> +++ b/drivers/platform/x86/dell/dell_rbu.c
> @@ -322,7 +322,7 @@ static void packet_empty_list(void)
> * zero out the RBU packet memory before freeing
> * to make sure there are no stale RBU packets left in memory
> */
> - memset(newpacket->data, 0, rbu_data.packetsize);
> + memset(newpacket->data, 0, newpacket->length);
> set_memory_wb((unsigned long)newpacket->data,
> 1 << newpacket->ordernum);
> free_pages((unsigned long) newpacket->data,
>

--
i.

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CCing linux-next and Tamir Duberstein, who authored the culprit.

On 30.05.25 08:23, Rudraksha Gupta wrote:
> Logs: https://gitlab.postmarketos.org/LogicalErzor/pmaports/-/jobs/1368490
>
> Archive: https://web.archive.org/web/20250530060232/https://
> gitlab.postmarketos.org/LogicalErzor/pmaports/-/jobs/1368490/raw

I ran into the same error on aarch64 and x86_64 when building -next for
Fedora today using the rawhide config:

https://download.copr.fedorainfracloud.org/results/@kernel-vanilla/next/fedora-rawhide-x86_64/09103515-next-next-all/builder-live.log.gz
https://download.copr.fedorainfracloud.org/results/@kernel-vanilla/next/fedora-rawhide-aarch64/09103515-next-next-all/builder-live.log.gz

Reverting b20fbbc08a363f ("rust: check type of `$ptr` in
`container_of!`") fixed things. That's the patch Rudraksha suspected to
be the root of the problem (see the quote below).

Ciao, Thorsten

> Snip:
>
> ||
>
> |EXPORTS rust/exports_core_generated.h|
> |
> ||
> RUSTC L rust/compiler_builtins.o
> ||
> RUSTC L rust/ffi.o
> ||
> RUSTC L rust/build_error.o
> ||
> RUSTC L rust/pin_init.o
> ||
> RUSTC L rust/bindings.o
> ||
> RUSTC L rust/uapi.o
> ||
> EXPORTS rust/exports_bindings_generated.h
> ||
> RUSTC L rust/kernel.o
> ||
> error[E0308]: mismatched types
> ||
> --> rust/kernel/lib.rs:234:45
> ||
> |
> ||
> 234 | $crate::assert_same_type(field_ptr, (&raw const (*container_ptr).
> $($fields)*).cast_mut());
> ||
> | ------------------------ ---------
> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ expected `*const
> drm_device`, found `*mut Opaque<drm_device>`
> ||
> | | |
> ||
> | | expected all arguments to be this `*const drm_device` type because
> they need to match the type of this parameter
> ||
> | arguments to this function are incorrect
> ||
> |
> ||
> ::: rust/kernel/drm/device.rs:140:18
> ||
> |
> ||
> 140 | unsafe { crate::container_of!(ptr, Self, dev) }.cast_mut()
> ||
> | ------------------------------------ in this macro invocation
> ||
> |
> ||
> = note: expected raw pointer `*const drm_device`
> ||
> found raw pointer `*mut Opaque<drm_device>`
> ||
> note: function defined here
> ||
> --> rust/kernel/lib.rs:241:8
> ||
> |
> ||
> 241 | pub fn assert_same_type<T>(_: T, _: T) {}
> ||
> | ^^^^^^^^^^^^^^^^ - ---- ---- this parameter needs to match the `*const
> drm_device` type of parameter #1
> ||
> | | |
> ||
> | | parameter #2 needs to match the `*const drm_device` type of this
> parameter
> ||
> | parameter #1 and parameter #2 both reference this parameter `T`
> ||
> = note: this error originates in the macro `crate::container_of` (in
> Nightly builds, run with -Z macro-backtrace for more info)
> ||
> error[E0308]: mismatched types
> ||
> --> rust/kernel/lib.rs:234:45
> ||
> |
> ||
> 234 | $crate::assert_same_type(field_ptr, (&raw const (*container_ptr).
> $($fields)*).cast_mut());
> ||
> | ------------------------ ---------
> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ expected `*mut
> drm_gem_object`, found `*mut Opaque<drm_gem_object>`
> ||
> | | |
> ||
> | | expected all arguments to be this `*mut drm_gem_object` type because
> they need to match the type of this parameter
> ||
> | arguments to this function are incorrect
> ||
> |
> ||
> ::: rust/kernel/drm/gem/mod.rs:130:20
> ||
> |
> ||
> 130 | unsafe { &*crate::container_of!(self_ptr, Object<T>, obj) }
> ||
> | ---------------------------------------------- in this macro invocation
> ||
> |
> ||
> = note: expected raw pointer `*mut drm_gem_object`
> ||
> found raw pointer `*mut Opaque<drm_gem_object>`
> ||
> note: function defined here
> ||
> --> rust/kernel/lib.rs:241:8
> ||
> |
> ||
> 241 | pub fn assert_same_type<T>(_: T, _: T) {}
> ||
> | ^^^^^^^^^^^^^^^^ - ---- ---- this parameter needs to match the `*mut
> drm_gem_object` type of parameter #1
> ||
> | | |
> ||
> | | parameter #2 needs to match the `*mut drm_gem_object` type of this
> parameter
> ||
> | parameter #1 and parameter #2 both reference this parameter `T`
> ||
> = note: this error originates in the macro `crate::container_of` (in
> Nightly builds, run with -Z macro-backtrace for more info)
> ||
> error[E0308]: mismatched types
> ||
> --> rust/kernel/lib.rs:234:45
> ||
> |
> ||
> 234 | $crate::assert_same_type(field_ptr, (&raw const (*container_ptr).
> $($fields)*).cast_mut());
> ||
> | ------------------------ ---------
> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ expected `*mut
> drm_gem_object`, found `*mut Opaque<drm_gem_object>`
> ||
> | | |
> ||
> | | expected all arguments to be this `*mut drm_gem_object` type because
> they need to match the type of this parameter
> ||
> | arguments to this function are incorrect
> ||
> |
> ||
> ::: rust/kernel/drm/gem/mod.rs:273:29
> ||
> |
> ||
> 273 | let this = unsafe { crate::container_of!(obj, Self, obj) };
> ||
> | ------------------------------------ in this macro invocation
> ||
> |
> ||
> = note: expected raw pointer `*mut drm_gem_object`
> ||
> found raw pointer `*mut Opaque<drm_gem_object>`
> ||
> note: function defined here
> ||
> --> rust/kernel/lib.rs:241:8
> ||
> |
> ||
> 241 | pub fn assert_same_type<T>(_: T, _: T) {}
> ||
> | ^^^^^^^^^^^^^^^^ - ---- ---- this parameter needs to match the `*mut
> drm_gem_object` type of parameter #1
> ||
> | | |
> ||
> | | parameter #2 needs to match the `*mut drm_gem_object` type of this
> parameter
> ||
> | parameter #1 and parameter #2 both reference this parameter `T`
> ||
> = note: this error originates in the macro `crate::container_of` (in
> Nightly builds, run with -Z macro-backtrace for more info)
> ||
> error: aborting due to 3 previous errors
> ||
> For more information about this error, try `rustc --explain E0308`.
> ||
> make[2]: *** [rust/Makefile:538: rust/kernel.o] Error 1
> ||
> make[1]: *** [/home/pmos/build/src/linux-next-next-20250530/
> Makefile:1285: prepare] Error 2
> ||make: *** [Makefile:248: __sub-make] Error 2|
>
>
> Bad: next-20250530
>
> Good: next-20250528
>
>
> Likely introduced with: https://lore.kernel.org/all/
> CANiq72mFiCrzawVUVOU2giJtBVsRdAO3sGtDsZptPuFvmid3EQ@xxxxxxxxxxxxxx/
>
>
> Repo: https://gitlab.postmarketos.org/LogicalErzor/pmaports/-/tree/rust/
> device/testing/linux-next
>
> How it's built (Alpine-like build system):
>
> - https://archive.ph/vxEmk
>
> Config fragments (in addition to qcom_defconfig):
>
> - https://archive.ph/q4hfc
>
> - https://archive.ph/RKgFf
>
>
>

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Subject: Re: [PATCH 0/2] fix MADV_COLLAPSE issue if THP settings are disabled
Content-Language: en-GB
To: Baolin Wang <baolin.wang@xxxxxxxxxxxxxxxxx>, akpm@xxxxxxxxxxxxxxxxxxxx,
hughd@xxxxxxxxxx, david@xxxxxxxxxx
Cc: lorenzo.stoakes@xxxxxxxxxx, Liam.Howlett@xxxxxxxxxx, npache@xxxxxxxxxx,
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On 29/05/2025 09:23, Baolin Wang wrote:
> As we discussed in the previous thread [1], the MADV_COLLAPSE will ignore
> the system-wide anon/shmem THP sysfs settings, which means that even though
> we have disabled the anon/shmem THP configuration, MADV_COLLAPSE will still
> attempt to collapse into a anon/shmem THP. This violates the rule we have
> agreed upon: never means never. This patch set will address this issue.

This is a drive-by comment from me without having the previous context, but...

Surely MADV_COLLAPSE *should* ignore the THP sysfs settings? It's a deliberate
user-initiated, synchonous request to use huge pages for a range of memory.
There is nothing *transparent* about it, it just happens to be implemented using
the same logic that THP uses.

I always thought this was a deliberate design decision.

Thanks,
Ryan

>
> [1] https://lore.kernel.org/all/1f00fdc3-a3a3-464b-8565-4c1b23d34f8d@xxxxxxxxxxxxxxxxx/
>
> Baolin Wang (2):
> mm: huge_memory: disallow hugepages if the system-wide THP sysfs
> settings are disabled
> mm: shmem: disallow hugepages if the system-wide shmem THP sysfs
> settings are disabled
>
> include/linux/huge_mm.h | 23 +++++++++++++++++++----
> mm/huge_memory.c | 2 +-
> mm/shmem.c | 12 ++++++------
> 3 files changed, 26 insertions(+), 11 deletions(-)
>

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Subject: Re: [PATCH 2/2] mm/damon/sysfs-schemes: add use_nodes_of_tier on
sysfs-schemes
Thread-Topic: [PATCH 2/2] mm/damon/sysfs-schemes: add use_nodes_of_tier on
sysfs-schemes
Thread-Index: AdvRN0I/Pe3LT5XZQBaj9QtYPLbiIg==
Date: Fri, 30 May 2025 08:04:42 +0000
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From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
Date: Fri, 30 May 2025 10:06:16 +0200
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Subject: Re: [PATCH 14/17] pinctrl: renesas: Move fixed assignments to
'pinctrl_desc' definition
To: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Cc: Linus Walleij <linus.walleij@xxxxxxxxxx>, Basavaraj Natikar <Basavaraj.Natikar@xxxxxxx>,
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Hi Krzysztof,

CC wsa

On Wed, 28 May 2025 at 19:55, Krzysztof Kozlowski
<krzysztof.kozlowski@xxxxxxxxxx> wrote:
> On 28/05/2025 14:54, Geert Uytterhoeven wrote:
> >> .pmxops = &rzn1_pmx_ops,
> >> .confops = &rzn1_pinconf_ops,
> >> .owner = THIS_MODULE,
> >> + .pins = rzn1_pins,
> >> + .npins = ARRAY_SIZE(rzn1_pins),
> >> };
> >>
> >> static int rzn1_pinctrl_parse_groups(struct device_node *np,
> >> @@ -878,8 +880,6 @@ static int rzn1_pinctrl_probe(struct platform_device *pdev)
> >>
> >> ipctl->dev = &pdev->dev;
> >> rzn1_pinctrl_desc.name = dev_name(&pdev->dev);
> >
> > ... if you would replace this assignment by a hardcoded name
> > like "pinctrl-rzn1".
>
> I saw it, but this would not be equivalent. dev_name includes platform
> bus id, e.g. pinctrl-rzn1.0 which might matter here - conflict of names.
> Are you sure this would work fine?

There can be only one anyway.
Most drivers used a fixed name:

drivers/pinctrl/renesas/pinctrl-rza1.c: rza1_pctl->desc.name = DRIVER_NAME;
drivers/pinctrl/renesas/pinctrl-rza2.c: priv->desc.name = DRIVER_NAME;
drivers/pinctrl/renesas/pinctrl-rzg2l.c: pctrl->desc.name = DRV_NAME;
drivers/pinctrl/renesas/pinctrl-rzn1.c: rzn1_pinctrl_desc.name =
dev_name(&pdev->dev);
drivers/pinctrl/renesas/pinctrl-rzt2h.c: desc->name = DRV_NAME;
drivers/pinctrl/renesas/pinctrl-rzv2m.c: pctrl->desc.name = DRV_NAME;
drivers/pinctrl/renesas/pinctrl.c: pmx->pctl_desc.name = DRV_NAME;

It might change the path in debugfs (/sys/kernel/debug/pinctrl/) though.
Wolfram?

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

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On 29.05.25 09:46, Michal Hocko wrote:
> On Wed 28-05-25 23:01:04, David Hildenbrand wrote:
> [...]
>> I think we just have to be careful to document it properly -- especially the
>> shortcomings and that this feature might become a problem in the future.
>> Movable user-space page tables getting placed on CMA memory would probably
>> not be a problem if we don't care about ... user-space data either way.
>
> I think makedumpfile could refuse to capture a dump if userspace memory
> is requested to enforce this.

Yeah, it will be tricky once we support placing other memory on CMA
regions. E.g., there was the discussion of making some slab allocations
movable.

But probably, in such a configuration, we would later simply refuse to
active CMA kdump.

>
>> The whole "Direct I/O takes max 1s" part is a bit shaky. Maybe it could be
>> configurable how long to wait? 10s is certainly "safer".
>
> Quite honestly we will never know and rather than making this
> configurable I would go with reasonably large. Couple of seconds
> certainly do not matter for the kdump situations but I would go as far
> as minutes.

I recall that somebody raised that kdump downtime might be problematic
(might affect service downtime?).

So I would just add a kconfig option with a default of 10s.

But even better if we can avoid the kconfig and just make it 10s for all
setups.

I would not suggest having a different (runtime/boottime) way of
configuring this.

--
Cheers,

David / dhildenb

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Date: Fri, 30 May 2025 10:07:33 +0200
From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
To: "Rafael J. Wysocki" <rafael@xxxxxxxxxx>
Cc: "Rafael J. Wysocki" <rjw@xxxxxxxxxxxxx>,
x86 Maintainers <x86@xxxxxxxxxx>,
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Subject: Re: [PATCH v1 0/2] x86/smp: Fix power regression introduced by
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On Thu, May 29, 2025 at 11:38:05AM +0200, Rafael J. Wysocki wrote:

> First off, I'm not sure if all of the requisite things are ready then
> (sysfs etc.).

Pretty much everything is already running at early_initcall(). Sysfs
certainly is.

> We may end up doing this eventually, but it may not be straightforward.
>
> More importantly, this is not a change for 6.15.y (y > 0).

Seriously, have you even tried?

AFAICT the below is all that is needed. That boots just fine on the one
randon system I tried, and seems to still work.

And this is plenty small enough to go into 6.15.y

diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c
index 0835da449db8..0f25de8081af 100644
--- a/drivers/cpuidle/cpuidle.c
+++ b/drivers/cpuidle/cpuidle.c
@@ -814,4 +814,4 @@ static int __init cpuidle_init(void)

module_param(off, int, 0444);
module_param_string(governor, param_governor, CPUIDLE_NAME_LEN, 0444);
-core_initcall(cpuidle_init);
+early_initcall(cpuidle_init);

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From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
Date: Fri, 30 May 2025 10:07:54 +0200
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Subject: Re: pmdomain: renesas: rcar: Use str_on_off() helper in
rcar_sysc_power() and rcar_gen4_sysc_power()
To: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
Cc: shao.mingyin@xxxxxxxxxx, ulf.hansson@xxxxxxxxxx, magnus.damm@xxxxxxxxx,
linux-pm@xxxxxxxxxxxxxxx, linux-renesas-soc@xxxxxxxxxxxxxxx,
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Hi Krzysztof,

On Thu, 29 May 2025 at 08:41, Krzysztof Kozlowski <krzk@xxxxxxxxxx> wrote:
> On 29/05/2025 04:13, shao.mingyin@xxxxxxxxxx wrote:
> > From: Shao Mingyin <shao.mingyin@xxxxxxxxxx>
> >
> > Remove hard-coded strings by using the str_on_off() helper function.
> >
> > Signed-off-by: Shao Mingyin <shao.mingyin@xxxxxxxxxx>
> > ---
> > drivers/pmdomain/renesas/rcar-gen4-sysc.c | 3 ++-
> > drivers/pmdomain/renesas/rcar-sysc.c | 3 ++-
>
> Stop sending such trivial patches one driver per patch, but entire
> subsystem in one patch. That's a lot of churn, considering this was
> rejected:

Was it? I only see my Rb, and a review comment asking for more...

> https://lore.kernel.org/all/20250114203547.1013010-1-krzysztof.kozlowski@xxxxxxxxxx/

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

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From: Yu Kuai <yukuai1@xxxxxxxxxxxxxxx>
To: axboe@xxxxxxxxx
Cc: linux-block@xxxxxxxxxxxxxxx,
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Subject: [PATCH RFC 0/4] blk-mq-sched: support request batch dispatching for sq elevator
Date: Fri, 30 May 2025 16:03:51 +0800
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From: Yu Kuai <yukuai3@xxxxxxxxxx>

Lock contention for sq elevator is quite intense when multiple contexts
are dispatching request, main reason is that a global lock is held and
release for each request:

while
spin_lock
disaptch one request
spin_unlock

This set support request batch dispatching to reduce the lock contention
a bit.

A simple test for null_blk in my VM:
32 job randwrite

| elevator | bandwidth Mib/s |
| -------------------------- | --------------- |
| none | 813 |
| deadline before this patch | 531 |
| deadline after this patch | 689 |

The test is one-sided, however, this is just a quick test to show this
set might be meaningful. I'm sending this RFC and want to get some
feedbacks before I continue work on this set.

Noted: do not test bfq for this set, it's not changed yet(like patch 2
for deadline).

Yu Kuai (4):
elevator: introduce global lock for sq_shared elevator
mq-deadline: switch to use elevator lock
blk-mq-sched: refactor __blk_mq_do_dispatch_sched()
blk-mq-sched: support request batch dispatching for sq elevator

block/blk-mq-sched.c | 224 +++++++++++++++++++++++++++++--------------
block/blk-mq.c | 5 +-
block/blk-mq.h | 21 ++++
block/elevator.c | 1 +
block/elevator.h | 62 +++++++++++-
block/mq-deadline.c | 60 +++++-------
6 files changed, 259 insertions(+), 114 deletions(-)

--
2.39.2

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Subject: [PATCH RFC 1/4] elevator: introduce global lock for sq_shared elevator
Date: Fri, 30 May 2025 16:03:52 +0800
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From: Yu Kuai <yukuai3@xxxxxxxxxx>

Currently, both mq-deadline and bfq have internal global lock, prepare
to convert them to use this high level lock and support batch request
dispatching.

Signed-off-by: Yu Kuai <yukuai3@xxxxxxxxxx>
---
block/blk-mq-sched.c | 4 +--
block/blk-mq.c | 5 ++--
block/elevator.c | 1 +
block/elevator.h | 61 ++++++++++++++++++++++++++++++++++++++++++--
4 files changed, 64 insertions(+), 7 deletions(-)

diff --git a/block/blk-mq-sched.c b/block/blk-mq-sched.c
index 55a0fd105147..c1390d3e6381 100644
--- a/block/blk-mq-sched.c
+++ b/block/blk-mq-sched.c
@@ -113,7 +113,7 @@ static int __blk_mq_do_dispatch_sched(struct blk_mq_hw_ctx *hctx)
if (budget_token < 0)
break;

- rq = e->type->ops.dispatch_request(hctx);
+ rq = elevator_dispatch_request(hctx);
if (!rq) {
blk_mq_put_dispatch_budget(q, budget_token);
/*
@@ -342,7 +342,7 @@ bool blk_mq_sched_bio_merge(struct request_queue *q, struct bio *bio,
enum hctx_type type;

if (e && e->type->ops.bio_merge) {
- ret = e->type->ops.bio_merge(q, bio, nr_segs);
+ ret = elevator_bio_merge(q, bio, nr_segs);
goto out_put;
}

diff --git a/block/blk-mq.c b/block/blk-mq.c
index 4806b867e37d..2650b7b28d1e 100644
--- a/block/blk-mq.c
+++ b/block/blk-mq.c
@@ -2637,7 +2637,7 @@ static void blk_mq_insert_request(struct request *rq, blk_insert_t flags)
WARN_ON_ONCE(rq->tag != BLK_MQ_NO_TAG);

list_add(&rq->queuelist, &list);
- q->elevator->type->ops.insert_requests(hctx, &list, flags);
+ elevator_insert_requests(hctx, &list, flags);
} else {
trace_block_rq_insert(rq);

@@ -2912,8 +2912,7 @@ static void blk_mq_dispatch_list(struct rq_list *rqs, bool from_sched)
spin_unlock(&this_hctx->lock);
blk_mq_run_hw_queue(this_hctx, from_sched);
} else if (this_hctx->queue->elevator) {
- this_hctx->queue->elevator->type->ops.insert_requests(this_hctx,
- &list, 0);
+ elevator_insert_requests(this_hctx, &list, 0);
blk_mq_run_hw_queue(this_hctx, from_sched);
} else {
blk_mq_insert_requests(this_hctx, this_ctx, &list, from_sched);
diff --git a/block/elevator.c b/block/elevator.c
index ab22542e6cf0..91df270d9d91 100644
--- a/block/elevator.c
+++ b/block/elevator.c
@@ -144,6 +144,7 @@ struct elevator_queue *elevator_alloc(struct request_queue *q,
eq->type = e;
kobject_init(&eq->kobj, &elv_ktype);
mutex_init(&eq->sysfs_lock);
+ spin_lock_init(&eq->lock);
hash_init(eq->hash);

return eq;
diff --git a/block/elevator.h b/block/elevator.h
index a07ce773a38f..8399dfe5c3b6 100644
--- a/block/elevator.h
+++ b/block/elevator.h
@@ -110,12 +110,12 @@ struct request *elv_rqhash_find(struct request_queue *q, sector_t offset);
/*
* each queue has an elevator_queue associated with it
*/
-struct elevator_queue
-{
+struct elevator_queue {
struct elevator_type *type;
void *elevator_data;
struct kobject kobj;
struct mutex sysfs_lock;
+ spinlock_t lock;
unsigned long flags;
DECLARE_HASHTABLE(hash, ELV_HASH_BITS);
};
@@ -186,4 +186,61 @@ extern struct request *elv_rb_find(struct rb_root *, sector_t);
void blk_mq_sched_reg_debugfs(struct request_queue *q);
void blk_mq_sched_unreg_debugfs(struct request_queue *q);

+#define elevator_lock(e) spin_lock_irq(&(e)->lock)
+#define elevator_unlock(e) spin_unlock_irq(&(e)->lock)
+
+static inline struct request *elevator_dispatch_request(
+ struct blk_mq_hw_ctx *hctx)
+{
+ struct request_queue *q = hctx->queue;
+ struct elevator_queue *e = q->elevator;
+ bool sq_shared = blk_queue_sq_sched(q);
+ struct request *rq;
+
+ if (sq_shared)
+ elevator_lock(e);
+
+ rq = e->type->ops.dispatch_request(hctx);
+
+ if (sq_shared)
+ elevator_unlock(e);
+
+ return rq;
+}
+
+static inline void elevator_insert_requests(struct blk_mq_hw_ctx *hctx,
+ struct list_head *list,
+ blk_insert_t flags)
+{
+ struct request_queue *q = hctx->queue;
+ struct elevator_queue *e = q->elevator;
+ bool sq_shared = blk_queue_sq_sched(q);
+
+ if (sq_shared)
+ elevator_lock(e);
+
+ e->type->ops.insert_requests(hctx, list, flags);
+
+ if (sq_shared)
+ elevator_unlock(e);
+}
+
+static inline bool elevator_bio_merge(struct request_queue *q, struct bio *bio,
+ unsigned int nr_segs)
+{
+ struct elevator_queue *e = q->elevator;
+ bool sq_shared = blk_queue_sq_sched(q);
+ bool ret;
+
+ if (sq_shared)
+ elevator_lock(e);
+
+ ret = e->type->ops.bio_merge(q, bio, nr_segs);
+
+ if (sq_shared)
+ elevator_unlock(e);
+
+ return ret;
+}
+
#endif /* _ELEVATOR_H */
--
2.39.2

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From: Yu Kuai <yukuai1@xxxxxxxxxxxxxxx>
To: axboe@xxxxxxxxx
Cc: linux-block@xxxxxxxxxxxxxxx,
linux-kernel@xxxxxxxxxxxxxxx,
yukuai3@xxxxxxxxxx,
yukuai1@xxxxxxxxxxxxxxx,
yi.zhang@xxxxxxxxxx,
yangerkun@xxxxxxxxxx,
johnny.chenyi@xxxxxxxxxx
Subject: [PATCH RFC 3/4] blk-mq-sched: refactor __blk_mq_do_dispatch_sched()
Date: Fri, 30 May 2025 16:03:54 +0800
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From: Yu Kuai <yukuai3@xxxxxxxxxx>

Introduce struct sched_dispatch_ctx(), and split it into
elevator_dispatch_one_request() and elevator_finish_dispatch(). Make
code cleaner and prepare to support request batch dispatching.

Signed-off-by: Yu Kuai <yukuai3@xxxxxxxxxx>
---
block/blk-mq-sched.c | 181 ++++++++++++++++++++++++++-----------------
1 file changed, 109 insertions(+), 72 deletions(-)

diff --git a/block/blk-mq-sched.c b/block/blk-mq-sched.c
index c1390d3e6381..990d0f19594a 100644
--- a/block/blk-mq-sched.c
+++ b/block/blk-mq-sched.c
@@ -74,85 +74,88 @@ static bool blk_mq_dispatch_hctx_list(struct list_head *rq_list)

#define BLK_MQ_BUDGET_DELAY 3 /* ms units */

-/*
- * Only SCSI implements .get_budget and .put_budget, and SCSI restarts
- * its queue by itself in its completion handler, so we don't need to
- * restart queue if .get_budget() fails to get the budget.
- *
- * Returns -EAGAIN if hctx->dispatch was found non-empty and run_work has to
- * be run again. This is necessary to avoid starving flushes.
- */
-static int __blk_mq_do_dispatch_sched(struct blk_mq_hw_ctx *hctx)
-{
- struct request_queue *q = hctx->queue;
- struct elevator_queue *e = q->elevator;
- bool multi_hctxs = false, run_queue = false;
- bool dispatched = false, busy = false;
- unsigned int max_dispatch;
- LIST_HEAD(rq_list);
- int count = 0;
+struct sched_dispatch_ctx {
+ struct blk_mq_hw_ctx *hctx;
+ struct elevator_queue *e;
+ struct request_queue *q;

- if (hctx->dispatch_busy)
- max_dispatch = 1;
- else
- max_dispatch = hctx->queue->nr_requests;
+ struct list_head rq_list;
+ int count;

- do {
- struct request *rq;
- int budget_token;
+ bool multi_hctxs;
+ bool run_queue;
+ bool busy;
+};

- if (e->type->ops.has_work && !e->type->ops.has_work(hctx))
- break;
+static bool elevator_can_dispatch(struct sched_dispatch_ctx *ctx)
+{
+ if (ctx->e->type->ops.has_work &&
+ !ctx->e->type->ops.has_work(ctx->hctx))
+ return false;

- if (!list_empty_careful(&hctx->dispatch)) {
- busy = true;
- break;
- }
+ if (!list_empty_careful(&ctx->hctx->dispatch)) {
+ ctx->busy = true;
+ return false;
+ }

- budget_token = blk_mq_get_dispatch_budget(q);
- if (budget_token < 0)
- break;
+ return true;
+}

- rq = elevator_dispatch_request(hctx);
- if (!rq) {
- blk_mq_put_dispatch_budget(q, budget_token);
- /*
- * We're releasing without dispatching. Holding the
- * budget could have blocked any "hctx"s with the
- * same queue and if we didn't dispatch then there's
- * no guarantee anyone will kick the queue. Kick it
- * ourselves.
- */
- run_queue = true;
- break;
- }
+static bool elevator_dispatch_one_request(struct sched_dispatch_ctx *ctx)
+{
+ struct request *rq;
+ int budget_token;

- blk_mq_set_rq_budget_token(rq, budget_token);
+ if (!elevator_can_dispatch(ctx))
+ return false;

- /*
- * Now this rq owns the budget which has to be released
- * if this rq won't be queued to driver via .queue_rq()
- * in blk_mq_dispatch_rq_list().
- */
- list_add_tail(&rq->queuelist, &rq_list);
- count++;
- if (rq->mq_hctx != hctx)
- multi_hctxs = true;
+ budget_token = blk_mq_get_dispatch_budget(ctx->q);
+ if (budget_token < 0)
+ return false;

+ rq = elevator_dispatch_request(ctx->hctx);
+ if (!rq) {
+ blk_mq_put_dispatch_budget(ctx->q, budget_token);
/*
- * If we cannot get tag for the request, stop dequeueing
- * requests from the IO scheduler. We are unlikely to be able
- * to submit them anyway and it creates false impression for
- * scheduling heuristics that the device can take more IO.
+ * We're releasing without dispatching. Holding the
+ * budget could have blocked any "hctx"s with the
+ * same queue and if we didn't dispatch then there's
+ * no guarantee anyone will kick the queue. Kick it
+ * ourselves.
*/
- if (!blk_mq_get_driver_tag(rq))
- break;
- } while (count < max_dispatch);
+ ctx->run_queue = true;
+ return false;
+ }

- if (!count) {
- if (run_queue)
- blk_mq_delay_run_hw_queues(q, BLK_MQ_BUDGET_DELAY);
- } else if (multi_hctxs) {
+ blk_mq_set_rq_budget_token(rq, budget_token);
+
+ /*
+ * Now this rq owns the budget which has to be released
+ * if this rq won't be queued to driver via .queue_rq()
+ * in blk_mq_dispatch_rq_list().
+ */
+ list_add_tail(&rq->queuelist, &ctx->rq_list);
+ ctx->count++;
+ if (rq->mq_hctx != ctx->hctx)
+ ctx->multi_hctxs = true;
+
+ /*
+ * If we cannot get tag for the request, stop dequeueing
+ * requests from the IO scheduler. We are unlikely to be able
+ * to submit them anyway and it creates false impression for
+ * scheduling heuristics that the device can take more IO.
+ */
+ return blk_mq_get_driver_tag(rq);
+}
+
+static int elevator_finish_dispatch(struct sched_dispatch_ctx *ctx)
+{
+ bool dispatched = false;
+
+ if (!ctx->count) {
+ if (ctx->run_queue)
+ blk_mq_delay_run_hw_queues(ctx->q, BLK_MQ_BUDGET_DELAY);
+ } else if (ctx->multi_hctxs) {
/*
* Requests from different hctx may be dequeued from some
* schedulers, such as bfq and deadline.
@@ -160,19 +163,53 @@ static int __blk_mq_do_dispatch_sched(struct blk_mq_hw_ctx *hctx)
* Sort the requests in the list according to their hctx,
* dispatch batching requests from same hctx at a time.
*/
- list_sort(NULL, &rq_list, sched_rq_cmp);
+ list_sort(NULL, &ctx->rq_list, sched_rq_cmp);
do {
- dispatched |= blk_mq_dispatch_hctx_list(&rq_list);
- } while (!list_empty(&rq_list));
+ dispatched |= blk_mq_dispatch_hctx_list(&ctx->rq_list);
+ } while (!list_empty(&ctx->rq_list));
} else {
- dispatched = blk_mq_dispatch_rq_list(hctx, &rq_list, false);
+ dispatched = blk_mq_dispatch_rq_list(ctx->hctx, &ctx->rq_list,
+ false);
}

- if (busy)
+ if (ctx->busy)
return -EAGAIN;
+
return !!dispatched;
}

+/*
+ * Only SCSI implements .get_budget and .put_budget, and SCSI restarts
+ * its queue by itself in its completion handler, so we don't need to
+ * restart queue if .get_budget() fails to get the budget.
+ *
+ * Returns -EAGAIN if hctx->dispatch was found non-empty and run_work has to
+ * be run again. This is necessary to avoid starving flushes.
+ */
+static int __blk_mq_do_dispatch_sched(struct blk_mq_hw_ctx *hctx)
+{
+ unsigned int max_dispatch;
+ struct sched_dispatch_ctx ctx = {
+ .hctx = hctx,
+ .q = hctx->queue,
+ .e = hctx->queue->elevator,
+ };
+
+ INIT_LIST_HEAD(&ctx.rq_list);
+
+ if (hctx->dispatch_busy)
+ max_dispatch = 1;
+ else
+ max_dispatch = hctx->queue->nr_requests;
+
+ do {
+ if (!elevator_dispatch_one_request(&ctx))
+ break;
+ } while (ctx.count < max_dispatch);
+
+ return elevator_finish_dispatch(&ctx);
+}
+
static int blk_mq_do_dispatch_sched(struct blk_mq_hw_ctx *hctx)
{
unsigned long end = jiffies + HZ;
--
2.39.2

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From: Yu Kuai <yukuai1@xxxxxxxxxxxxxxx>
To: axboe@xxxxxxxxx
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yukuai3@xxxxxxxxxx,
yukuai1@xxxxxxxxxxxxxxx,
yi.zhang@xxxxxxxxxx,
yangerkun@xxxxxxxxxx,
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Subject: [PATCH RFC 2/4] mq-deadline: switch to use elevator lock
Date: Fri, 30 May 2025 16:03:53 +0800
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From: Yu Kuai <yukuai3@xxxxxxxxxx>

There are no functional changes, prepare to support batch request
dispatching.

Signed-off-by: Yu Kuai <yukuai3@xxxxxxxxxx>
---
block/elevator.h | 1 +
block/mq-deadline.c | 60 +++++++++++++++++----------------------------
2 files changed, 23 insertions(+), 38 deletions(-)

diff --git a/block/elevator.h b/block/elevator.h
index 8399dfe5c3b6..1b325d131c51 100644
--- a/block/elevator.h
+++ b/block/elevator.h
@@ -188,6 +188,7 @@ void blk_mq_sched_unreg_debugfs(struct request_queue *q);

#define elevator_lock(e) spin_lock_irq(&(e)->lock)
#define elevator_unlock(e) spin_unlock_irq(&(e)->lock)
+#define elevator_assert_lock(e) lockdep_assert_held(&(e)->lock)

static inline struct request *elevator_dispatch_request(
struct blk_mq_hw_ctx *hctx)
diff --git a/block/mq-deadline.c b/block/mq-deadline.c
index 2edf1cac06d5..a68a50da6320 100644
--- a/block/mq-deadline.c
+++ b/block/mq-deadline.c
@@ -101,7 +101,7 @@ struct deadline_data {
u32 async_depth;
int prio_aging_expire;

- spinlock_t lock;
+ struct elevator_queue *eq;
};

/* Maps an I/O priority class to a deadline scheduler priority. */
@@ -213,7 +213,7 @@ static void dd_merged_requests(struct request_queue *q, struct request *req,
const u8 ioprio_class = dd_rq_ioclass(next);
const enum dd_prio prio = ioprio_class_to_prio[ioprio_class];

- lockdep_assert_held(&dd->lock);
+ elevator_assert_lock(q->elevator);

dd->per_prio[prio].stats.merged++;

@@ -253,7 +253,7 @@ static u32 dd_queued(struct deadline_data *dd, enum dd_prio prio)
{
const struct io_stats_per_prio *stats = &dd->per_prio[prio].stats;

- lockdep_assert_held(&dd->lock);
+ elevator_assert_lock(dd->eq);

return stats->inserted - atomic_read(&stats->completed);
}
@@ -323,7 +323,7 @@ static struct request *__dd_dispatch_request(struct deadline_data *dd,
enum dd_prio prio;
u8 ioprio_class;

- lockdep_assert_held(&dd->lock);
+ elevator_assert_lock(dd->eq);

if (!list_empty(&per_prio->dispatch)) {
rq = list_first_entry(&per_prio->dispatch, struct request,
@@ -434,7 +434,7 @@ static struct request *dd_dispatch_prio_aged_requests(struct deadline_data *dd,
enum dd_prio prio;
int prio_cnt;

- lockdep_assert_held(&dd->lock);
+ elevator_assert_lock(dd->eq);

prio_cnt = !!dd_queued(dd, DD_RT_PRIO) + !!dd_queued(dd, DD_BE_PRIO) +
!!dd_queued(dd, DD_IDLE_PRIO);
@@ -466,10 +466,9 @@ static struct request *dd_dispatch_request(struct blk_mq_hw_ctx *hctx)
struct request *rq;
enum dd_prio prio;

- spin_lock(&dd->lock);
rq = dd_dispatch_prio_aged_requests(dd, now);
if (rq)
- goto unlock;
+ return rq;

/*
* Next, dispatch requests in priority order. Ignore lower priority
@@ -481,9 +480,6 @@ static struct request *dd_dispatch_request(struct blk_mq_hw_ctx *hctx)
break;
}

-unlock:
- spin_unlock(&dd->lock);
-
return rq;
}

@@ -552,9 +548,9 @@ static void dd_exit_sched(struct elevator_queue *e)
WARN_ON_ONCE(!list_empty(&per_prio->fifo_list[DD_READ]));
WARN_ON_ONCE(!list_empty(&per_prio->fifo_list[DD_WRITE]));

- spin_lock(&dd->lock);
+ elevator_lock(e);
queued = dd_queued(dd, prio);
- spin_unlock(&dd->lock);
+ elevator_unlock(e);

WARN_ONCE(queued != 0,
"statistics for priority %d: i %u m %u d %u c %u\n",
@@ -601,7 +597,7 @@ static int dd_init_sched(struct request_queue *q, struct elevator_type *e)
dd->last_dir = DD_WRITE;
dd->fifo_batch = fifo_batch;
dd->prio_aging_expire = prio_aging_expire;
- spin_lock_init(&dd->lock);
+ dd->eq = eq;

/* We dispatch from request queue wide instead of hw queue */
blk_queue_flag_set(QUEUE_FLAG_SQ_SCHED, q);
@@ -653,14 +649,10 @@ static int dd_request_merge(struct request_queue *q, struct request **rq,
static bool dd_bio_merge(struct request_queue *q, struct bio *bio,
unsigned int nr_segs)
{
- struct deadline_data *dd = q->elevator->elevator_data;
struct request *free = NULL;
bool ret;

- spin_lock(&dd->lock);
ret = blk_mq_sched_try_merge(q, bio, nr_segs, &free);
- spin_unlock(&dd->lock);
-
if (free)
blk_mq_free_request(free);

@@ -681,8 +673,6 @@ static void dd_insert_request(struct blk_mq_hw_ctx *hctx, struct request *rq,
struct dd_per_prio *per_prio;
enum dd_prio prio;

- lockdep_assert_held(&dd->lock);
-
prio = ioprio_class_to_prio[ioprio_class];
per_prio = &dd->per_prio[prio];
if (!rq->elv.priv[0])
@@ -721,11 +711,8 @@ static void dd_insert_requests(struct blk_mq_hw_ctx *hctx,
struct list_head *list,
blk_insert_t flags)
{
- struct request_queue *q = hctx->queue;
- struct deadline_data *dd = q->elevator->elevator_data;
LIST_HEAD(free);

- spin_lock(&dd->lock);
while (!list_empty(list)) {
struct request *rq;

@@ -733,7 +720,6 @@ static void dd_insert_requests(struct blk_mq_hw_ctx *hctx,
list_del_init(&rq->queuelist);
dd_insert_request(hctx, rq, flags, &free);
}
- spin_unlock(&dd->lock);

blk_mq_free_requests(&free);
}
@@ -849,13 +835,13 @@ static const struct elv_fs_entry deadline_attrs[] = {
#define DEADLINE_DEBUGFS_DDIR_ATTRS(prio, data_dir, name) \
static void *deadline_##name##_fifo_start(struct seq_file *m, \
loff_t *pos) \
- __acquires(&dd->lock) \
+ __acquires(&q->elevator->lock) \
{ \
struct request_queue *q = m->private; \
struct deadline_data *dd = q->elevator->elevator_data; \
struct dd_per_prio *per_prio = &dd->per_prio[prio]; \
\
- spin_lock(&dd->lock); \
+ elevator_lock(q->elevator); \
return seq_list_start(&per_prio->fifo_list[data_dir], *pos); \
} \
\
@@ -870,12 +856,11 @@ static void *deadline_##name##_fifo_next(struct seq_file *m, void *v, \
} \
\
static void deadline_##name##_fifo_stop(struct seq_file *m, void *v) \
- __releases(&dd->lock) \
+ __releases(&q->elevator->lock) \
{ \
struct request_queue *q = m->private; \
- struct deadline_data *dd = q->elevator->elevator_data; \
\
- spin_unlock(&dd->lock); \
+ elevator_unlock(q->elevator); \
} \
\
static const struct seq_operations deadline_##name##_fifo_seq_ops = { \
@@ -941,11 +926,11 @@ static int dd_queued_show(void *data, struct seq_file *m)
struct deadline_data *dd = q->elevator->elevator_data;
u32 rt, be, idle;

- spin_lock(&dd->lock);
+ elevator_lock(q->elevator);
rt = dd_queued(dd, DD_RT_PRIO);
be = dd_queued(dd, DD_BE_PRIO);
idle = dd_queued(dd, DD_IDLE_PRIO);
- spin_unlock(&dd->lock);
+ elevator_unlock(q->elevator);

seq_printf(m, "%u %u %u\n", rt, be, idle);

@@ -957,7 +942,7 @@ static u32 dd_owned_by_driver(struct deadline_data *dd, enum dd_prio prio)
{
const struct io_stats_per_prio *stats = &dd->per_prio[prio].stats;

- lockdep_assert_held(&dd->lock);
+ elevator_assert_lock(dd->eq);

return stats->dispatched + stats->merged -
atomic_read(&stats->completed);
@@ -969,11 +954,11 @@ static int dd_owned_by_driver_show(void *data, struct seq_file *m)
struct deadline_data *dd = q->elevator->elevator_data;
u32 rt, be, idle;

- spin_lock(&dd->lock);
+ elevator_lock(q->elevator);
rt = dd_owned_by_driver(dd, DD_RT_PRIO);
be = dd_owned_by_driver(dd, DD_BE_PRIO);
idle = dd_owned_by_driver(dd, DD_IDLE_PRIO);
- spin_unlock(&dd->lock);
+ elevator_unlock(q->elevator);

seq_printf(m, "%u %u %u\n", rt, be, idle);

@@ -983,13 +968,13 @@ static int dd_owned_by_driver_show(void *data, struct seq_file *m)
#define DEADLINE_DISPATCH_ATTR(prio) \
static void *deadline_dispatch##prio##_start(struct seq_file *m, \
loff_t *pos) \
- __acquires(&dd->lock) \
+ __acquires(&q->elevator->lock) \
{ \
struct request_queue *q = m->private; \
struct deadline_data *dd = q->elevator->elevator_data; \
struct dd_per_prio *per_prio = &dd->per_prio[prio]; \
\
- spin_lock(&dd->lock); \
+ elevator_lock(q->elevator); \
return seq_list_start(&per_prio->dispatch, *pos); \
} \
\
@@ -1004,12 +989,11 @@ static void *deadline_dispatch##prio##_next(struct seq_file *m, \
} \
\
static void deadline_dispatch##prio##_stop(struct seq_file *m, void *v) \
- __releases(&dd->lock) \
+ __releases(&q->elevator->lock) \
{ \
struct request_queue *q = m->private; \
- struct deadline_data *dd = q->elevator->elevator_data; \
\
- spin_unlock(&dd->lock); \
+ elevator_unlock(q->elevator); \
} \
\
static const struct seq_operations deadline_dispatch##prio##_seq_ops = { \
--
2.39.2

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From: Yu Kuai <yukuai1@xxxxxxxxxxxxxxx>
To: axboe@xxxxxxxxx
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linux-kernel@xxxxxxxxxxxxxxx,
yukuai3@xxxxxxxxxx,
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Subject: [PATCH RFC 4/4] blk-mq-sched: support request batch dispatching for sq elevator
Date: Fri, 30 May 2025 16:03:55 +0800
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From: Yu Kuai <yukuai3@xxxxxxxxxx>

Before this patch, each context will hold a global lock to dispatch one
request at a time, which introduce intense lock contention:

lock
ops.dispatch_request
unlock

Hence support dispatch a batch of requests while holding the lock to
reduce lock contention.

Signed-off-by: Yu Kuai <yukuai3@xxxxxxxxxx>
---
block/blk-mq-sched.c | 53 ++++++++++++++++++++++++++++++++++++++++----
block/blk-mq.h | 21 ++++++++++++++++++
2 files changed, 70 insertions(+), 4 deletions(-)

diff --git a/block/blk-mq-sched.c b/block/blk-mq-sched.c
index 990d0f19594a..d255c3e6c2a8 100644
--- a/block/blk-mq-sched.c
+++ b/block/blk-mq-sched.c
@@ -101,6 +101,47 @@ static bool elevator_can_dispatch(struct sched_dispatch_ctx *ctx)
return true;
}

+static void elevator_dispatch_requests(struct sched_dispatch_ctx *ctx)
+{
+ struct request *rq;
+ int budget_token[BUDGET_TOKEN_BATCH];
+ int count;
+ int i;
+
+ while (true) {
+ if (!elevator_can_dispatch(ctx))
+ return;
+
+ count = blk_mq_get_dispatch_budgets(ctx->q, budget_token);
+ if (count <= 0)
+ return;
+
+ elevator_lock(ctx->e);
+ for (i = 0; i < count; ++i) {
+ rq = ctx->e->type->ops.dispatch_request(ctx->hctx);
+ if (!rq) {
+ ctx->run_queue = true;
+ goto err_free_budgets;
+ }
+
+ blk_mq_set_rq_budget_token(rq, budget_token[i]);
+ list_add_tail(&rq->queuelist, &ctx->rq_list);
+ ctx->count++;
+ if (rq->mq_hctx != ctx->hctx)
+ ctx->multi_hctxs = true;
+
+ if (!blk_mq_get_driver_tag(rq))
+ goto err_free_budgets;
+ }
+ elevator_unlock(ctx->e);
+ }
+
+err_free_budgets:
+ elevator_unlock(ctx->e);
+ for (; i < count; ++i)
+ blk_mq_put_dispatch_budget(ctx->q, budget_token[i]);
+}
+
static bool elevator_dispatch_one_request(struct sched_dispatch_ctx *ctx)
{
struct request *rq;
@@ -202,10 +243,14 @@ static int __blk_mq_do_dispatch_sched(struct blk_mq_hw_ctx *hctx)
else
max_dispatch = hctx->queue->nr_requests;

- do {
- if (!elevator_dispatch_one_request(&ctx))
- break;
- } while (ctx.count < max_dispatch);
+ if (blk_queue_sq_sched(ctx.q))
+ elevator_dispatch_requests(&ctx);
+ else {
+ do {
+ if (!elevator_dispatch_one_request(&ctx))
+ break;
+ } while (ctx.count < max_dispatch);
+ }

return elevator_finish_dispatch(&ctx);
}
diff --git a/block/blk-mq.h b/block/blk-mq.h
index affb2e14b56e..450c16a07841 100644
--- a/block/blk-mq.h
+++ b/block/blk-mq.h
@@ -37,6 +37,7 @@ enum {
};

#define BLK_MQ_CPU_WORK_BATCH (8)
+#define BUDGET_TOKEN_BATCH (8)

typedef unsigned int __bitwise blk_insert_t;
#define BLK_MQ_INSERT_AT_HEAD ((__force blk_insert_t)0x01)
@@ -262,6 +263,26 @@ static inline int blk_mq_get_dispatch_budget(struct request_queue *q)
return 0;
}

+static inline int blk_mq_get_dispatch_budgets(struct request_queue *q,
+ int *budget_token)
+{
+ int count = 0;
+
+ while (count < BUDGET_TOKEN_BATCH) {
+ int token = 0;
+
+ if (q->mq_ops->get_budget)
+ token = q->mq_ops->get_budget(q);
+
+ if (token < 0)
+ return count;
+
+ budget_token[count++] = token;
+ }
+
+ return count;
+}
+
static inline void blk_mq_set_rq_budget_token(struct request *rq, int token)
{
if (token < 0)
--
2.39.2

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Subject: Re: [PATCH v1] tty: serdev: serdev-ttyport: Fix use-after-free in
ttyport_close() due to uninitialized serport->tty
To: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
CC: Rob Herring <robh@xxxxxxxxxx>, Jiri Slaby <jirislaby@xxxxxxxxxx>,
<linux-serial@xxxxxxxxxxxxxxx>, <linux-kernel@xxxxxxxxxxxxxxx>,
<liulzhao@xxxxxxxxxxxxxxxx>, <quic_chejiang@xxxxxxxxxxx>,
<zaiyongc@xxxxxxxxxxxxxxxx>, <quic_zijuhu@xxxxxxxxxxx>,
<quic_mohamull@xxxxxxxxxxx>,
Panicker Harish <quic_pharish@xxxxxxxxxxx>
References: <20250430111617.1151390-1-quic_cxin@xxxxxxxxxxx>
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On 5/29/2025 5:07 PM, Greg Kroah-Hartman wrote:
> On Fri, May 23, 2025 at 10:52:27AM +0800, Xin Chen wrote:
>>
>>
>> On 5/14/2025 5:14 PM, Xin Chen wrote:
>>>
>>>
>>> On 5/8/2025 5:41 PM, Greg Kroah-Hartman wrote:
>>>> On Thu, May 08, 2025 at 05:29:18PM +0800, Xin Chen wrote:
>>>>>
>>>>> On 4/30/2025 7:40 PM, Greg Kroah-Hartman wrote:
>>>>>> On Wed, Apr 30, 2025 at 07:16:17PM +0800, Xin Chen wrote:
>>>>>>> When ttyport_open() fails to initialize a tty device, serport->tty is not
>>>>>>> --- a/drivers/tty/serdev/serdev-ttyport.c
>>>>>>> +++ b/drivers/tty/serdev/serdev-ttyport.c
>>>>>>> @@ -88,6 +88,10 @@ static void ttyport_write_flush(struct serdev_controller *ctrl)
>>>>>>> {
>>>>>>> struct serport *serport = serdev_controller_get_drvdata(ctrl);
>>>>>>> struct tty_struct *tty = serport->tty;
>>>>>>> + if (!tty) {
>>>>>>> + dev_err(&ctrl->dev, "tty is null\n");
>>>>>>> + return;
>>>>>>> + }
>>>>>>
>>>>>> What prevents tty from going NULL right after you just checked this?
>>>>>
>>>>> First sorry for reply so late for I have a long statutory holidays.
>>>>> Maybe I don't get your point. From my side, there is nothing to prevent it.
>>>>> Check here is to avoid code go on if tty is NULL.
>>>>
>>>> Yes, but the problem is, serport->tty could change to be NULL right
>>>> after you check it, so you have not removed the real race that can
>>>> happen here. There is no lock, so by adding this check you are only
>>>> reducing the risk of the problem happening, not actually fixing the
>>>> issue so that it will never happen.
>>>>
>>>> Please fix it so that this can never happen.
>>>>
>>>
>>> Actually I have never thought the race condition issue since the crash I met is
>>> not caused by race condition. It's caused due to Bluetooth driver call
>>> ttyport_close() after ttyport_open() failed. This two action happen one after
>>> another in one thread and it seems impossible to have race condition. And with
>>> my fix the crash doesn't happen again in several test of same case.
>>>
>>> Let me introduce the complete process for you:
>>> 1) hci_dev_open_sync()->
>>> hci_dev_init_sync()->hci_dev_setup_sync()->hdev->setup()(hci_uart_setup)->qca_setup(),
>>> here in qca_setup(), qca_read_soc_version() fails and goto out, then calls
>>> serdev_device_close() to close tty normally. And then call serdev_device_open()
>>> to retry.
>>> 2) serdev_device_open() fails due to tty_init_dev() fails, then tty gets
>>> released, which means this time the tty has been freed succesfully.
>>> 3) Return back to upper func hci_dev_open_sync(),
>>> hdev->close()(hci_uart_close) is called. And hci_uart_close calls
>>> hci_uart_flush() and serdev_device_close(). serdev_device_close() tries to close
>>> tty again, it's calltrace is serdev_device_close()->ttyport_close()->tty_lock(),
>>> tty_unlock(), tty_release_struct(). The four funcs hci_uart_flush(), tty_lock(),
>>> tty_unlock(), tty_release_struct() read tty pointer's value, which is invalid
>>> and causes crash.
>>>
>>
>> Hi Greg, could you please take some time to review my reply?
>
> I am not disputing the fact that there is a bug here, I'm just saying
> that you can't test for a value and then act on it without a lock
> protecting that action because the value can be changed right after you
> test for it.
>
> You might not see this in your testing, as you have narrowed the window
> that the value can change, but you have not solved the issue properly,
> right?
>
> thanks,
>
> greg k-h

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