Re: [PATCH 4/5] arm64: dts: qcom: ipq5018: add MDIO buses

[George Moussalem]

Hi Konrad

On 5/27/25 15:07, Konrad Dybcio wrote:
> On 5/25/25 7:56 PM, George Moussalem via B4 Relay wrote:
> > From: George Moussalem <george.moussalem@xxxxxxxxxxx>
> >
> > IPQ5018 contains two mdio buses of which one bus is used to control the
> > SoC's internal GE PHY, while the other bus is connected to external PHYs
> > or switches.
> >
> > There's already support for IPQ5018 in the mdio-ipq4019 driver, so let's
> > simply add the mdio nodes for them.
> >
> > Signed-off-by: George Moussalem <george.moussalem@xxxxxxxxxxx>
> > ---
> >   arch/arm64/boot/dts/qcom/ipq5018.dtsi | 24 ++++++++++++++++++++++++
> >   1 file changed, 24 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> > index 130360014c5e14c778e348d37e601f60325b0b14..03ebc3e305b267c98a034c41ce47a39269afce75 100644
> > --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> > @@ -182,6 +182,30 @@ pcie0_phy: phy@86000 {
> >   			status = "disabled";
> >   		};
> >   
> > +		mdio0: mdio@88000 {
> > +			compatible = "qcom,ipq5018-mdio";
> > +			reg = <0x00088000 0x64>;
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +
> > +			clocks = <&gcc GCC_MDIO0_AHB_CLK>;
> > +			clock-names = "gcc_mdio_ahb_clk";
>
> I see there's resets named GCC_MDIO[01]_BCR - are they related to
> these hosts?

Yes, they are specific to these mdio buses, yet not required for 
operation, just like ipq8074 and ipq6018 don't list this reset in their 
respective nodes in the dtsi.

> fwiw the addressses look good
>
> Konrad

Best regards,
George