Re: [PATCH v4 0/6] spi: spi-fsl-dspi: Target mode improvements
From: Vladimir Oltean
Date: Tue Jul 01 2025 - 11:30:38 EST
On Tue, Jul 01, 2025 at 04:16:50PM +0100, Mark Brown wrote:
> On Tue, Jul 01, 2025 at 05:53:12PM +0300, Vladimir Oltean wrote:
>
> > I suppose one could try using FIFO mode for transfers which request
> > timestamping and DMA for transfers which don't. I don't have an insight
> > into what impact that will have on the driver, but I suspect at the very
> > least one will have to transform "DSPI_DMA_MODE" into "dspi->dma_available"
> > and "dspi->dma_in_use", and reconfigure the SPI_RSER register (interrupt
> > routing, to DMA engine or to CPUs) at every transfer rather than at dspi_init().
>
> > The question is whether you would be willing to see and maintain such
> > complexity increase, when AFAIK, the LS1028A FIFO mode passes its
> > requirements.
>
> Switching between modes is incredibly common, usually between PIO (for
> very short transfers) and DMA, that's no problem. Factoring in
> timestamping seems like a reasonable signal I guess, might trip someone
> who was trying to benchmark things up but probably not normal users.
Ah, ok, I vaguely remember something being discussed about can_dma()
on previous iterations of this patch, but in a different context.
Then that's an avenue to explore, I guess. Looking at that method's
prototype, I suppose dspi could simply return can_dma = false "if (xfer->ptp_sts)"
(timestamp requested), i.e. no core involvement in the decision process at all?
Sounds interesting, but I can't promise I'll follow up with patches.