Re: [PATCH 0/7] EDAC/Intel: Make memory controller instances into a flexible array

[Luck, Tony]

On Thu, Jul 31, 2025 at 10:55:27PM +0800, Qiuxu Zhuo wrote:
> Problem
> =======
> The current array of memory controller instances for Intel server EDAC
> driver is sized using the macro NUM_IMC. Each time EDAC support is added
> for a new CPU, NUM_IMC needs to be updated to ensure it is greater than
> or equal to the number of memory controllers for the new CPU. This approach
> is inconvenient and also results in memory waste for older CPUs with fewer
> memory controllers.
> 
> Solution
> ========
> Make the array of memory controller instances a flexible array and
> determine its size from configuration data or at runtime.
> 
> Patches
> =======
> Patch 1~3: Refactor code to be independent of *NUM*_IMC macros.
> Patch   4: Make the array of memory controller instances a flexible array.
> Patch 5~7: Clean up and remove unused *NUM*_IMC macros.
> 
> Testing
> =======
> Pass basic testing on Cascade Lake, {Sapphire, Granite} Rapids server CPUs.
> - Load and unload the {skx,i10nm_}edac driver.
> - Receive events for memory correctable errors.
> - Decode memory errors.
> 
> This patch series is on top of v6.16.

Applied to edac-drivers branch of RAS tree.

Thanks

-Tony