Add parsing for Zilsd and Zclsd ISA extensions which were ratified inReviewed-by: Nutty Liu <nutty.liu@xxxxxxxxxxx>
commit f88abf1 ("Integrating load/store pair for RV32 with the
main manual") of the riscv-isa-manual.
Signed-off-by: Pincheng Wang <pincheng.plct@xxxxxxxxxxxxxxxx>
---
arch/riscv/include/asm/hwcap.h | 2 ++
arch/riscv/kernel/cpufeature.c | 24 ++++++++++++++++++++++++
2 files changed, 26 insertions(+)