[PATCH v5 0/2] Add driver support for Eswin eic7700 SoC ethernet controller
From: weishangjuan
Date: Thu Sep 04 2025 - 05:00:22 EST
From: Shangjuan Wei <weishangjuan@xxxxxxxxxxxxxxxxxx>
This series depends on the config option patch [1].
[1] https://lore.kernel.org/all/20250825132427.1618089-3-pinkesh.vaghela@xxxxxxxxxxxxxx/
Updates:
Changes in v5:
- Updated eswin,eic7700-eth.yaml
- Use "items" instead "enum" for clock-names
- Arrange clocks description in correct order
- Delete redundant descriptions for eswin,hsp-sp-csr property
- Updated dwmac-eic7700.c
- Optimize the implementation of eic7700_ appy_delay
- Update comments and remove reg checking
- Use FIELD_PREP in eic7700_apply_delay function
- Use clk_bulk related APIs to manage clks
- Link to v4: https://lore.kernel.org/all/20250827081135.2243-1-weishangjuan@xxxxxxxxxxxxxxxxxx/
Changes in v4:
- Updated eswin,eic7700-eth.yaml
- Modify reg:minItems:1 to reg:maxItems: 1
- Delete minItems and maxItems of clock and clock-names
- Delete phy-mode and phy-handle properties
- Add description for clock
- Add types of clock-names
- Delete descriptions for rx-internal-delay-ps and tx-internal-delay-ps
- Add enum value for rx-internal-delay-ps and tx-internal-delay-ps
- Modify description for eswin,hsp-sp-csr property
- Delete eswin,syscrg-csr and eswin,dly-hsp-reg properties
- Modify phy-mode="rgmii" to phy-mode="rgmii-id"
- Updated dwmac-eic7700.c
- Remove fix_mac_speed and configure different delays for different rates
- Merge the offset of the dly register into the eswin, hsp sp csr attributes
for unified management
- Add missing Author and optimize the number of characters per
line to within 80
- Support default delay configuration and add the handling of vendor delay
configuration
- Add clks_config for pm_runtime
- Modify the attribute format, such as eswin,hsp_sp_csr to eswin,hsp-sp-csr
- Link to v3: https://lore.kernel.org/all/20250703091808.1092-1-weishangjuan@xxxxxxxxxxxxxxxxxx/
Changes in v3:
- Updated eswin,eic7700-eth.yaml
- Modify snps,dwmac to snps,dwmac-5.20
- Remove the description of reg
- Modify the value of clock minItems and maxItems
- Modify the value of clock-names minItems and maxItems
- Add descriptions of snps,write-questions, snps,read-questions
- Add rx-internal-delay-ps and tx-internal-delay-ps properties
- Modify descriptions for custom properties, such as eswin,hsp-sp-csr
- Delete snps,axi-config property
- Add snps,fixed-burst snps,aal snps,tso properties
- Delete snps,lpi_en property
- Modify format of custom properties
- Updated dwmac-eic7700.c
- Simplify drivers and remove unnecessary API and DTS attribute configurations
- Increase the mapping from tx/rx_delay_ps to private dly
- Link to v2: https://lore.kernel.org/all/aDad+8YHEFdOIs38@xxxxxxxxxxxxxxxxxxxxx/
Changes in v2:
- Updated eswin,eic7700-eth.yaml
- Add snps,dwmac in binding file
- Modify the description of reg
- Modify the number of clock-names
- Changed the names of reset-names and phy-mode
- Add description for custom properties, such as eswin,hsp_sp_csr
- Delete snps,blen snps,rd_osr_lmt snps,wr_osr_lmt properties
- Updated dwmac-eic7700.c
- Remove the code related to PHY LED configuration from the MAC driver
- Adjust the code format and driver interfaces, such as replacing kzalloc
with devm_kzalloc, etc.
- Use phylib instead of the GPIO API in the driver to implement the PHY
reset function
- Link to v1: https://lore.kernel.org/all/20250516010849.784-1-weishangjuan@xxxxxxxxxxxxxxxxxx/
Shangjuan Wei (2):
dt-bindings: ethernet: eswin: Document for EIC7700 SoC
ethernet: eswin: Add eic7700 ethernet driver
.../bindings/net/eswin,eic7700-eth.yaml | 128 +++++++++
drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 +
drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
.../ethernet/stmicro/stmmac/dwmac-eic7700.c | 250 ++++++++++++++++++
4 files changed, 390 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c
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2.17.1