Re: [v7, net-next 03/10] bng_en: Add initial support for CP and NQ rings

From: Simon Horman
Date: Tue Sep 16 2025 - 10:56:35 EST


On Fri, Sep 12, 2025 at 01:04:58AM +0530, Bhargava Marreddy wrote:
> Allocate CP and NQ related data structures and add support to
> associate NQ and CQ rings. Also, add the association of NQ, NAPI,
> and interrupts.
>
> Signed-off-by: Bhargava Marreddy <bhargava.marreddy@xxxxxxxxxxxx>
> Reviewed-by: Vikas Gupta <vikas.gupta@xxxxxxxxxxxx>
> Reviewed-by: Rajashekar Hudumula <rajashekar.hudumula@xxxxxxxxxxxx>

...

> +static int bnge_alloc_nq_tree(struct bnge_net *bn)
> +{
> + int i, j, ulp_msix, rc = -ENOMEM;
> + struct bnge_dev *bd = bn->bd;
> + int tcs = 1;
> +
> + ulp_msix = bnge_aux_get_msix(bd);
> + for (i = 0, j = 0; i < bd->nq_nr_rings; i++) {
> + bool sh = !!(bd->flags & BNGE_EN_SHARED_CHNL);
> + struct bnge_napi *bnapi = bn->bnapi[i];
> + struct bnge_nq_ring_info *nqr;
> + struct bnge_cp_ring_info *cpr;
> + struct bnge_ring_struct *ring;
> + int cp_count = 0, k;
> + int rx = 0, tx = 0;
> +
> + nqr = &bnapi->nq_ring;
> + nqr->bnapi = bnapi;
> + ring = &nqr->ring_struct;
> +
> + rc = bnge_alloc_ring(bd, &ring->ring_mem);
> + if (rc)
> + goto err_free_nq_tree;
> +
> + ring->map_idx = ulp_msix + i;
> +
> + if (i < bd->rx_nr_rings) {
> + cp_count++;
> + rx = 1;
> + }
> +
> + if ((sh && i < bd->tx_nr_rings) ||
> + (!sh && i >= bd->rx_nr_rings)) {
> + cp_count += tcs;
> + tx = 1;
> + }
> +
> + nqr->cp_ring_arr = kcalloc(cp_count, sizeof(*cpr),
> + GFP_KERNEL);
> + if (!nqr->cp_ring_arr)

I think that rc should be set to a negative return value, say -ENOMEM,
here. The function returns rc. And as is, rc is 0 at this point.

Flagged by Smatch.

> + goto err_free_nq_tree;
> +
> + nqr->cp_ring_count = cp_count;
> +
> + for (k = 0; k < cp_count; k++) {
> + cpr = &nqr->cp_ring_arr[k];
> + rc = alloc_one_cp_ring(bn, cpr);
> + if (rc)
> + goto err_free_nq_tree;
> +
> + cpr->bnapi = bnapi;
> + cpr->cp_idx = k;
> + if (!k && rx) {
> + bn->rx_ring[i].rx_cpr = cpr;
> + cpr->cp_ring_type = BNGE_NQ_HDL_TYPE_RX;
> + } else {
> + int n, tc = k - rx;
> +
> + n = BNGE_TC_TO_RING_BASE(bd, tc) + j;
> + bn->tx_ring[n].tx_cpr = cpr;
> + cpr->cp_ring_type = BNGE_NQ_HDL_TYPE_TX;
> + }
> + }
> + if (tx)
> + j++;
> + }
> + return 0;
> +
> +err_free_nq_tree:
> + bnge_free_nq_tree(bn);
> + return rc;
> +}
> +
> static bool bnge_separate_head_pool(struct bnge_rx_ring_info *rxr)
> {
> return rxr->need_head_pool || PAGE_SIZE > BNGE_RX_PAGE_SIZE;