Re: [PATCH 1/2] dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Kaanapali SoC

[Raviteja Laggyshetty]

On 9/25/2025 6:10 PM, Konrad Dybcio wrote:
> On 9/25/25 10:57 AM, Eugen Hristev wrote:
>>
>>
>> On 9/25/25 02:02, Jingyi Wang wrote:
>>> From: Raviteja Laggyshetty <raviteja.laggyshetty@xxxxxxxxxxxxxxxx>
>>>
>>> Document the RPMh Network-On-Chip Interconnect of the Kaanapali platform.
>>>
>>> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@xxxxxxxxxxxxxxxx>
>>> Signed-off-by: Jingyi Wang <jingyi.wang@xxxxxxxxxxxxxxxx>
>>> ---
> 
> [...]
> 
>>> +properties:
>>> +  compatible:
>>> +    enum:
>>> +      - qcom,kaanapali-aggre-noc
>>
>> Hi,
>>
>> Does Kaanapali have a single aggre node, or there are several ?
>> On previous SoC, I see there are two (aggre1 and aggre2).
>> Also in your driver (second patch), I notice aggre1_noc and aggre2_noc .
>> It would make sense to accurately describe here the hardware.
> 
> They're physically separate
> 
Yes, they are physically separate but the topology treats them as a single noc
with two slave connections to system noc which you have noticed in the topology file.

Thanks,
Raviteja.

> Konrad