Re: [Patch v4 03/17] x86/fpu/xstate: Add xsaves_nmi

[Mi, Dapeng]

On 9/30/2025 3:01 AM, Dave Hansen wrote:
> On 9/27/25 22:31, Mi, Dapeng wrote:
>>> Also, what supervisor components are involved here? Aren't we just
>>> talking about [XYZ]MM's?
>> Besides the SIMD registers [XYZ]MM, the CET_USR (only SSP) and APX eGPRs
>> would be supported as well.
> We should think long and hard about whether to use XSAVE for the CET
> SSP. I'm not convinced it's worth it.

Yeah, It's indeed inefficient to read a ONLY SSP register by using xsaves
instruction. Do you think if it's safe enough to directly read IA32_PL3_SSP
MSR by using rdmsr instruction?

IMO, It seems good enough to read IA32_PL3_SSP directly with rdmsr in NMI
context since we just need to know the real value in IA32_PL3_SSP when NMI
hits. Thanks.