Re: [PATCH V1 2/3] arm64: dts: qcom: sm8750: Add SDC2 nodes for sm8750 soc
From: Konrad Dybcio
Date: Wed Oct 08 2025 - 08:18:07 EST
On 10/7/25 7:44 AM, Sarthak Garg wrote:
> Add SD Card host controller for sm8750 soc.
>
> Signed-off-by: Sarthak Garg <sarthak.garg@xxxxxxxxxxxxxxxx>
> ---
[...]
> + sdhc_2: mmc@8804000 {
> + compatible = "qcom,sm8750-sdhci", "qcom,sdhci-msm-v5";
> + reg = <0 0x08804000 0 0x1000>;
> +
> + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hc_irq", "pwr_irq";
One a line, please
> +
> + clocks = <&gcc GCC_SDCC2_AHB_CLK>,
> + <&gcc GCC_SDCC2_APPS_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
Please align the '<'s
> + clock-names = "iface", "core", "xo";
One a line, please
> +
> + interconnects = <&aggre2_noc MASTER_SDCC_2 QCOM_ICC_TAG_ALWAYS
> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
> + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
> + &config_noc SLAVE_SDCC_2 QCOM_ICC_TAG_ACTIVE_ONLY>;
> + interconnect-names = "sdhc-ddr", "cpu-sdhc";
and here
> +
> + power-domains = <&rpmhpd RPMHPD_CX>;
> + operating-points-v2 = <&sdhc2_opp_table>;
> +
> + qcom,dll-config = <0x0007442c>;
> + qcom,ddr-config = <0x80040868>;
> +
> + iommus = <&apps_smmu 0x540 0x0>;
> + dma-coherent;
> +
> + bus-width = <4>;
> + max-sd-hs-hz = <37500000>;
> +
> + resets = <&gcc GCC_SDCC2_BCR>;
> + status = "disabled";
A \n before 'status' is customary
> +
> + sdhc2_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-100000000 {
> + opp-hz = /bits/ 64 <100000000>;
> + required-opps = <&rpmhpd_opp_low_svs>;
> + };
> +
> + opp-202000000 {
> + opp-hz = /bits/ 64 <202000000>;
> + required-opps = <&rpmhpd_opp_nom>;
This can work at SVS_L1
Konrad