Re: [PATCH v5] ASoC: wm8978: add missing BCLK divider setup

[Charles Keepax]

On Thu, Oct 09, 2025 at 12:27:19AM +0800, Brian Sune wrote:
> Apart from this core patch, due to request from Mark Brown and
> Charles Keepax. Overclock BCLK setup is applied, and dropped the
> possible lowest error BCLK result. On top of the overclocking,
> warning message is given to user as a reminding.
> This patch author do not agree with this design nor
> concept from first place!

Please read section 6.2 of the I2S specification[1], particularly
the last sentence before the note.

But if you are so concerned about the bclk being wrong, just
change your patch to only accept an exact bclk match? I am fine
with that, it's still an improvement on the current driver and
someone else can add the inexact matches later if they need them.

> +		for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) {
> +			bclk = wm8978->f_256fs / bclk_divs[i];
> +
> +			if (bclk < target_bclk) {
> +				if (min_diff != 0)
> +					dev_warn(component->dev,
> +						 "Auto BCLK cannot fit, BCLK using: #%u\n",
> +						 wm8978->f_256fs / bclk_divs[bclkdiv]);
> +				break;
> +			}
> +
> +			if (abs(bclk - target_bclk) < min_diff) {
> +				min_diff = abs(bclk - target_bclk);
> +				bclkdiv = i;
> +			}

What you missing here is that your bclk_divs are sorted so all
this min_diff is wasted effort. Each time you move to a higher
divider there are only two options:

1) You are closer to the target bclk than last time.
2) You are under the target bclk and the system won't work.

So the last value that gives a bclk above the target is the
min_diff by definition.

Thanks,
Charles

[1] https://www.nxp.com/docs/en/user-manual/UM11732.pdf