Re: [PATCH 3/6] spi: add multi_bus_mode field to struct spi_transfer
From: Nuno Sá
Date: Wed Oct 15 2025 - 06:15:30 EST
On Tue, 2025-10-14 at 17:02 -0500, David Lechner wrote:
> Add a new multi_bus_mode field to struct spi_transfer to allow
> peripherals that support multiple SPI buses to be used with a single
> SPI controller.
>
> This requires both the peripheral and the controller to have multiple
> serializers connected to separate data buses. It could also be used with
> a single controller and multiple peripherals that are functioning as a
> single logical device (similar to parallel memories).
>
> The possible values for this field have the following semantics:
>
> - SPI_MULTI_BUS_MODE_SINGLE: Only use the first bus. This means that it
> it is operating just like a conventional SPI bus. It is the default
> value so that existing drivers do not need to be modified.
>
> Example:
> tx_buf[0] = 0x88;
>
> struct spi_transfer xfer = {
> .tx_buf = tx_buf,
> .len = 1,
> };
>
> spi_sync_transfer(spi, &xfer, 1);
>
> controller > data bits > peripheral
> ---------- ---------------- ----------
> SDO 0 0-0-0-1-0-0-0-1 SDI 0
>
> - SPI_MULTI_BUS_MODE_MIRROR: Send a single data word over all of the
> buses at the same time. This only makes sense for writes and not
> for reads.
>
> Example:
> tx_buf[0] = 0x88;
>
> struct spi_transfer xfer = {
> .tx_buf = tx_buf,
> .len = 1,
> .multi_bus_mode = SPI_MULTI_BUS_MODE_MIRROR,
> };
>
> spi_sync_transfer(spi, &xfer, 1);
>
> controller > data bits > peripheral
> ---------- ---------------- ----------
> SDO 0 0-0-0-1-0-0-0-1 SDI 0
> SDO 1 0-0-0-1-0-0-0-1 SDI 1
>
> - SPI_MULTI_BUS_MODE_STRIPE: Send or receive two different data words at
> the same time, one on each bus.
>
> Example:
> struct spi_transfer xfer = {
> .rx_buf = rx_buf,
> .len = 2, /* must be multiple of number of buses */
> .multi_bus_mode = SPI_MULTI_BUS_MODE_STRIPE,
> };
>
> spi_sync_transfer(spi, &xfer, 1);
>
> controller < data bits < peripheral
> ---------- ---------------- ----------
> SDI 0 0-0-0-1-0-0-0-1 SDO 0
> SDI 1 1-0-0-0-1-0-0-0 SDO 1
Out of curiosity, how does this work for devices like AD4030 where the same word
is kind of interleaved between SDO lines? I guess it works the same (in terms of
SW) and is up to some IP core (typically in the FPGA) to "re-assemble" the word?
>
> After the transfer, rx_buf[0] == 0x11 (word from SDO 0) and
> rx_buf[1] == 0x88 (word from SDO 1). If the transfer was longer,
> the data would continue in an alternating fashion.
>
> Signed-off-by: David Lechner <dlechner@xxxxxxxxxxxx>
> ---
Looks good anyways,
Acked-by: Nuno Sá <nuno.sa@xxxxxxxxxx>
> include/linux/spi/spi.h | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
> index
> c314194d4e7e2b396795ece10e142118ca05f4eb..7d22ef5077d1229cac2574831f80092c591b
> 972f 100644
> --- a/include/linux/spi/spi.h
> +++ b/include/linux/spi/spi.h
> @@ -976,6 +976,8 @@ struct spi_res {
> * (SPI_NBITS_SINGLE) is used.
> * @rx_nbits: number of bits used for reading. If 0 the default
> * (SPI_NBITS_SINGLE) is used.
> + * @multi_bus_mode: How to serialize data on multiple buses. One of the
> + * SPI_MULTI_BUS_MODE_* values.
> * @len: size of rx and tx buffers (in bytes)
> * @speed_hz: Select a speed other than the device default for this
> * transfer. If 0 the default (from @spi_device) is used.
> @@ -1112,6 +1114,10 @@ struct spi_transfer {
> unsigned cs_change:1;
> unsigned tx_nbits:4;
> unsigned rx_nbits:4;
> + unsigned multi_bus_mode: 2;
> +#define SPI_MULTI_BUS_MODE_SINGLE 0 /* only use single bus */
> +#define SPI_MULTI_BUS_MODE_STRIPE 1 /* one data word per bus */
> +#define SPI_MULTI_BUS_MODE_MIRROR 2 /* same word sent on all buses */
> unsigned timestamped:1;
> bool dtr_mode;
> #define SPI_NBITS_SINGLE 0x01 /* 1-bit transfer */