Re: [PATCH 1/3] clk: renesas: r9a09g056: Add clocks and resets for DSI and LCDC modules

[Geert Uytterhoeven]

On Thu, 23 Oct 2025 at 23:07, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Add clock and reset definitions required to support the DSI and LCDC
> hardware blocks on the RZ/V2N SoC. This includes new core clocks, clock
> dividers, module clocks, and reset entries, as well as PLL and divider
> configurations specific to these peripherals.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>

Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-clk for v6.19.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds