[PATCH v5 03/10] arm64: dts: socfpga: agilex5: Add SMMU node
From: Steffen Trumtrar
Date: Fri Oct 24 2025 - 07:51:14 EST
From: Adrian Ng Ho Yin <adrian.ho.yin.ng@xxxxxxxxx>
Add SMMU node in Agilex5 device tree.
Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@xxxxxxxxx>
Signed-off-by: Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index c4ae09b242d07..4f7ed20749927 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -354,6 +354,18 @@ rst: rstmgr@10d11000 {
#reset-cells = <1>;
};
+ smmu: iommu@16000000 {
+ compatible = "arm,smmu-v3";
+ reg = <0x16000000 0x30000>;
+ interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "eventq", "gerror", "priq";
+ dma-coherent;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
spi0: spi@10da4000 {
compatible = "snps,dw-apb-ssi";
reg = <0x10da4000 0x1000>;
--
2.51.0