Re: [PATCH v10 04/10] PCI: cadence: Add support for High Perf Architecture (HPA) controller

[Hans Zhang]

On 10/31/2025 5:11 PM, Manivannan Sadhasivam wrote:
> > +
> > +static int cdns_pcie_hpa_host_wait_for_link(struct cdns_pcie *pcie)
> > +{
> > +     struct device *dev = pcie->dev;
> > +     struct cdns_pcie_rc *rc;
> > +     int retries, ret;
> > +
> > +     rc = container_of(pcie, struct cdns_pcie_rc, pcie);
> > +
> > +     /* Check if the link is up or not */
> > +     for (retries = 0; retries < LINK_WAIT_MAX_RETRIES; retries++) {
> > +             if (cdns_pcie_hpa_link_up(pcie)) {
> > +                     dev_info(dev, "Link up\n");
> > +                     return 0;
> > +             }
> > +             usleep_range(LINK_WAIT_USLEEP_MIN, LINK_WAIT_USLEEP_MAX);
> > +     }
> > +     if (rc->quirk_retrain_flag)
> > +             ret = cdns_pcie_retrain(pcie);
> > +     return ret;
> If 'quirk_retrain_flag' was not set, you are 'ret' will be uninitialized.


Hi Mani,

Thank you very much for your reply.

When the robot gave a warning, I replied as follows:

https://lore.kernel.org/linux-pci/293858b1-db91-4525-b8b3-c98c7837ec73@xxxxxxxxxxx/

Will change.


Please ask Manikandan to explain any other questions to Mani.


Best regards,
Hans