Re: [PATCH v2 12/13] serial: sh-sci: Add support for RZ/G3E RSCI SCIF

[Jiri Slaby]

Hi,

On 30. 10. 25, 18:58, Biju wrote:
> From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
>
> Add support for RZ/G3E RSCI SCIF(a.k.a FIFO mode). RSCI IP found on the
> RZ/G3E SoC is similar to RZ/T2H, but it has a 32-stage FIFO. it has 6
> clocks(5 module clocks + 1 external clock) instead of 3 clocks(2 module
> clocks + 1 external clock) on T2H and has multiple resets. Add support
> for the hardware flow control.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
...
> --- a/drivers/tty/serial/rsci.c
> +++ b/drivers/tty/serial/rsci.c
> @@ -11,6 +11,8 @@
...
> +static void rsci_finish_console_write(struct uart_port *port, u32 ctrl)
> +{
> +	rsci_serial_out(port, CCR0, ctrl & ~CCR0_TE);
> +	cpu_relax();

What's the intent of cpu_relax in here? It does not make much sense to 
me. If you need delay, use delay.

> +	rsci_serial_out(port, CCR0, ctrl);
> +}
> +
...
> diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
> index fac83dace27c..85b89c1ebf15 100644
> --- a/drivers/tty/serial/sh-sci.c
> +++ b/drivers/tty/serial/sh-sci.c
> @@ -3397,7 +3397,7 @@ static void sci_remove(struct platform_device *dev)
>   	if (s->port.fifosize > 1)
>   		device_remove_file(&dev->dev, &dev_attr_rx_fifo_trigger);
>   	if (type == PORT_SCIFA || type == PORT_SCIFB || type == PORT_HSCIF ||
> -	    type == SCI_PORT_RSCI)
> +	    type == SCI_PORT_RSCI || type == RSCI_PORT_SCIF)
>   		device_remove_file(&dev->dev, &dev_attr_rx_fifo_timeout);
...
> @@ -3759,7 +3763,8 @@ static int sci_probe(struct platform_device *dev)
>   			return ret;
>   	}
>   	if (sp->type == PORT_SCIFA || sp->type == PORT_SCIFB ||
> -	    sp->type == PORT_HSCIF || sp->type == SCI_PORT_RSCI) {
> +	    sp->type == PORT_HSCIF || sp->type == SCI_PORT_RSCI ||
> +	    sp->type == RSCI_PORT_SCIF) {

This test is duplicated -- you seem you need a helper for this.

thanks,
--
js
suse labs