Re: [PATCH v4 2/6] media: dt-bindings: Add CAMSS device for Kaanapali

[Hangxiang Ma]

On 10/30/2025 3:13 PM, Krzysztof Kozlowski wrote:
> On Tue, Oct 28, 2025 at 10:44:11PM -0700, Hangxiang Ma wrote:
> > Add the compatible string "qcom,kaanapali-camss" to support the Camera
> > Subsystem (CAMSS) on the Qualcomm Kaanapali platform.
> >
> > The Kaanapali (SM8550) platform provides:
>
> SM8550 is not Kaanapali, AFAIK. Looks like typo.
Yeah. That's typo. Will remove this version tag for Kaanapali series 
because CAMSS and other modules only use 'Kaanapali' name. Adding 
version like (SM8850) is not considerate.>> - 3 x VFE, 5 RDI per VFE
> > - 2 x VFE Lite, 4 RDI per VFE Lite
> > - 3 x CSID
> > - 2 x CSID Lite
> > - 6 x CSIPHY
> >
> > Signed-off-by: Hangxiang Ma <hangxiang.ma@xxxxxxxxxxxxxxxx>
> > ---
> >   .../bindings/media/qcom,kaanapali-camss.yaml       | 406 +++++++++++++++++++++
> >   1 file changed, 406 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/media/qcom,kaanapali-camss.yaml b/Documentation/devicetree/bindings/media/qcom,kaanapali-camss.yaml
> > new file mode 100644
> > index 000000000000..c34867022fd1
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/qcom,kaanapali-camss.yaml
> > @@ -0,0 +1,406 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/media/qcom,kaanapali-camss.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Qualcomm Kaanapali Camera Subsystem (CAMSS)
> > +
> > +maintainers:
> > +  - Hangxiang Ma <hangxiang.ma@xxxxxxxxxxxxxxxx>
> > +
> > +description:
> > +  The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.
> > +
> > +properties:
> > +  compatible:
> > +    const: qcom,kaanapali-camss
> > +
> > +  reg:
> > +    maxItems: 16
> > +
> > +  reg-names:
> > +    items:
> > +      - const: csid0
> > +      - const: csid1
> > +      - const: csid2
> > +      - const: csid_lite0
> > +      - const: csid_lite1
> > +      - const: csiphy0
> > +      - const: csiphy1
> > +      - const: csiphy2
> > +      - const: csiphy3
> > +      - const: csiphy4
> > +      - const: csiphy5
> > +      - const: vfe0
> > +      - const: vfe1
> > +      - const: vfe2
> > +      - const: vfe_lite0
> > +      - const: vfe_lite1
> > +
> > +  clocks:
> > +    maxItems: 34
> > +
> > +  clock-names:
> > +    items:
> > +      - const: camnoc_nrt_axi
> > +      - const: camnoc_rt_axi
> > +      - const: camnoc_rt_vfe0
> > +      - const: camnoc_rt_vfe1
> > +      - const: camnoc_rt_vfe2
> > +      - const: camnoc_rt_vfe_lite
> > +      - const: cam_top_ahb
> > +      - const: cam_top_fast_ahb
> > +      - const: csid
> > +      - const: csid_csiphy_rx
> > +      - const: csiphy0
> > +      - const: csiphy0_timer
> > +      - const: csiphy1
> > +      - const: csiphy1_timer
> > +      - const: csiphy2
> > +      - const: csiphy2_timer
> > +      - const: csiphy3
> > +      - const: csiphy3_timer
> > +      - const: csiphy4
> > +      - const: csiphy4_timer
> > +      - const: csiphy5
> > +      - const: csiphy5_timer
> > +      - const: gcc_hf_axi
> > +      - const: vfe0
> > +      - const: vfe0_fast_ahb
> > +      - const: vfe1
> > +      - const: vfe1_fast_ahb
> > +      - const: vfe2
> > +      - const: vfe2_fast_ahb
> > +      - const: vfe_lite
> > +      - const: vfe_lite_ahb
> > +      - const: vfe_lite_cphy_rx
> > +      - const: vfe_lite_csid
> > +      - const: qdss_debug_xo
> > +
> > +  interrupts:
> > +    maxItems: 16
> > +
> > +  interrupt-names:
> > +    items:
> > +      - const: csid0
> > +      - const: csid1
> > +      - const: csid2
> > +      - const: csid_lite0
> > +      - const: csid_lite1
> > +      - const: csiphy0
> > +      - const: csiphy1
> > +      - const: csiphy2
> > +      - const: csiphy3
> > +      - const: csiphy4
> > +      - const: csiphy5
> > +      - const: vfe0
> > +      - const: vfe1
> > +      - const: vfe2
> > +      - const: vfe_lite0
> > +      - const: vfe_lite1
> > +
> > +  interconnects:
> > +    maxItems: 2
> > +
> > +  interconnect-names:
> > +    items:
> > +      - const: ahb
> > +      - const: hf_mnoc
> > +
> > +  iommus:
> > +    maxItems: 1
> > +
> > +  power-domains:
> > +    items:
> > +      - description:
> > +          IFE0 GDSC - Image Front End, Global Distributed Switch Controller.
> > +      - description:
> > +          IFE1 GDSC - Image Front End, Global Distributed Switch Controller.
> > +      - description:
> > +          IFE2 GDSC - Image Front End, Global Distributed Switch Controller.
> > +      - description:
> > +          Titan GDSC - Titan ISP Block Global Distributed Switch Controller.
> > +
> > +  power-domain-names:
> > +    items:
> > +      - const: ife0
> > +      - const: ife1
> > +      - const: ife2
> > +      - const: top
> > +
> > +  vdd-csiphy0-0p8-supply:
> > +    description:
> > +      Phandle to a 0.8V regulator supply to CSIPHY0 core block.
> > +
> > +  vdd-csiphy0-1p2-supply:
> > +    description:
> > +      Phandle to a 1.2V regulator supply to CSIPHY0 pll block.
> > +
> > +  vdd-csiphy1-0p8-supply:
> > +    description:
> > +      Phandle to a 0.8V regulator supply to CSIPHY1 core block.
>
> Nothing in changelog explained why suddently 8 new supplies appeared.
>
> What exactly changed here?
>
> Best regards,
> Krzysztof
Thanks. Will add more detailed descriptions to explain this change in 
changelog. We once had a discussion with Bryan and Vladimir about these 
supplies name paradigm in v3 revision. That's the conclusion from that 
discussion.

---
Hangxiang