Re: [PATCH net-next 2/2] net: phy: microchip_t1s: configure link status control for LAN867x Rev.D0

From: Andrew Lunn

Date: Thu Oct 30 2025 - 10:53:55 EST


On Thu, Oct 30, 2025 at 03:52:58PM +0530, Parthiban Veerasooran wrote:
> Configure the link status in the Link Status Control register for
> LAN8670/1/2 Rev.D0 PHYs, depending on whether PLCA or CSMA/CD mode
> is enabled. When PLCA is enabled, the link status reflects the PLCA
> status. When PLCA is disabled (CSMA/CD mode), the PHY does not support
> autonegotiation, so the link status is forced active by setting
> the LINK_STATUS_SEMAPHORE bit.
>
> The link status control is configured:
> - During PHY initialization, for default CSMA/CD mode.
> - Whenever PLCA configuration is updated.
>
> This ensures correct link reporting and consistent behavior for
> LAN867x Rev.D0 devices.
>
> Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@xxxxxxxxxxxxx>

Reviewed-by: Andrew Lunn <andrew@xxxxxxx>

Andrew