Re: [PATCH 1/6] dt-bindings: spi: Add spi-buses property
From: Rob Herring
Date: Thu Oct 30 2025 - 09:51:28 EST
On Tue, Oct 21, 2025 at 09:59:22AM -0500, David Lechner wrote:
> On 10/21/25 9:21 AM, Rob Herring wrote:
> > On Tue, Oct 14, 2025 at 05:02:11PM -0500, David Lechner wrote:
> >> Add a spi-buses property to the spi-peripheral-props binding to allow
> >> specifying the SPI data bus or buses that a peripheral is connected to
> >> in cases where the SPI controller has more than one physical SPI data
> >> bus.
> >
> > Is there a reason why spi-rx-bus-width property doesn't work for you?
> > The only thing I see would be you need to define the order of the pins
> > like "data-lanes" property.
> >
> > Rob
>
> Because we can have both at the same time. In one of the other threads,
> we talked about the AD4630 ADC that will require this since it has 2 data
> buses each with a width of 4 (total of 8 lines).
>
> See: https://lore.kernel.org/linux-iio/ad929fe5-be03-4628-b95a-5c3523bae0c8@xxxxxxxxxxxx/
But it can't really be 2 independent buses/controllers unless the ADC
has 2 completely independent interfaces, right? Surely the clock is
shared across the 2 buses? So aren't you really just borrowing pins and
the fifo of the 2nd controller? That seems pretty controller specific to
support that. For example, how would you support this with spi-gpio
(obviously kind of pointless given the bandwidth needs with 8 data
lines) or any 2 independent instances of SPI controllers?
Rob