Re: [PATCH v11 1/2] crypto: hisilicon - qm updates BAR configuration

From: Alex Williamson

Date: Wed Oct 29 2025 - 09:26:21 EST


On Wed, 29 Oct 2025 20:24:40 +0800
Longfang Liu <liulongfang@xxxxxxxxxx> wrote:

> On new platforms greater than QM_HW_V3, the configuration region for the
> live migration function of the accelerator device is no longer
> placed in the VF, but is instead placed in the PF.
>
> Therefore, the configuration region of the live migration function
> needs to be opened when the QM driver is loaded. When the QM driver
> is uninstalled, the driver needs to clear this configuration.
>
> Signed-off-by: Longfang Liu <liulongfang@xxxxxxxxxx>
> Reviewed-by: Shameer Kolothum <shameerkolothum@xxxxxxxxx>
> Acked-by: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx>
> ---
> drivers/crypto/hisilicon/qm.c | 27 +++++++++++++++++++++++++++
> include/linux/hisi_acc_qm.h | 3 +++
> 2 files changed, 30 insertions(+)
>
> diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c
> index a5b96adf2d1e..f0fd0c3698eb 100644
> --- a/drivers/crypto/hisilicon/qm.c
> +++ b/drivers/crypto/hisilicon/qm.c
> @@ -3019,11 +3019,36 @@ static void qm_put_pci_res(struct hisi_qm *qm)
> pci_release_mem_regions(pdev);
> }
>
> +static void hisi_mig_region_clear(struct hisi_qm *qm)
> +{
> + u32 val;
> +
> + /* Clear migration region set of PF */
> + if (qm->fun_type == QM_HW_PF && qm->ver > QM_HW_V3) {
> + val = readl(qm->io_base + QM_MIG_REGION_SEL);
> + val &= ~BIT(0);
> + writel(val, qm->io_base + QM_MIG_REGION_SEL);
> + }
> +}
> +
> +static void hisi_mig_region_enable(struct hisi_qm *qm)
> +{
> + u32 val;
> +
> + /* Select migration region of PF */
> + if (qm->fun_type == QM_HW_PF && qm->ver > QM_HW_V3) {
> + val = readl(qm->io_base + QM_MIG_REGION_SEL);
> + val |= QM_MIG_REGION_EN;
> + writel(val, qm->io_base + QM_MIG_REGION_SEL);
> + }
> +}

Same as commented last time:

https://lore.kernel.org/all/20251027222011.05bac6bd@xxxxxxxxxxx/

> +
> static void hisi_qm_pci_uninit(struct hisi_qm *qm)
> {
> struct pci_dev *pdev = qm->pdev;
>
> pci_free_irq_vectors(pdev);
> + hisi_mig_region_clear(qm);
> qm_put_pci_res(qm);
> pci_disable_device(pdev);
> }
> @@ -5725,6 +5750,7 @@ int hisi_qm_init(struct hisi_qm *qm)
> goto err_free_qm_memory;
>
> qm_cmd_init(qm);
> + hisi_mig_region_enable(qm);
>
> return 0;
>
> @@ -5863,6 +5889,7 @@ static int qm_rebuild_for_resume(struct hisi_qm *qm)
> }
>
> qm_cmd_init(qm);
> + hisi_mig_region_enable(qm);
> hisi_qm_dev_err_init(qm);
> /* Set the doorbell timeout to QM_DB_TIMEOUT_CFG ns. */
> writel(QM_DB_TIMEOUT_SET, qm->io_base + QM_DB_TIMEOUT_CFG);
> diff --git a/include/linux/hisi_acc_qm.h b/include/linux/hisi_acc_qm.h
> index c4690e365ade..aa0129d20c51 100644
> --- a/include/linux/hisi_acc_qm.h
> +++ b/include/linux/hisi_acc_qm.h
> @@ -99,6 +99,9 @@
>
> #define QM_DEV_ALG_MAX_LEN 256
>
> +#define QM_MIG_REGION_SEL 0x100198
> +#define QM_MIG_REGION_EN 0x1
> +
> /* uacce mode of the driver */
> #define UACCE_MODE_NOUACCE 0 /* don't use uacce */
> #define UACCE_MODE_SVA 1 /* use uacce sva mode */