Re: [PATCH] dt-bindings: fpga: Convert lattice,ice40-fpga-mgr to DT schema

[Krzysztof Kozlowski]

On Wed, Oct 29, 2025 at 01:55:01PM -0500, Rob Herring (Arm) wrote:
> +
> +title: Lattice iCE40 FPGA Manager
> +
> +maintainers:
> +  - Joel Holdsworth <joel@xxxxxxxxxxxxxxxxxxx>
> +

You miss spi-peripheral-props

> +properties:
> +  compatible:
> +    const: lattice,ice40-fpga-mgr
> +
> +  reg:
> +    maxItems: 1
> +
> +  spi-max-frequency:
> +    minimum: 1000000
> +    maximum: 25000000
> +
> +  cdone-gpios:
> +    maxItems: 1
> +    description: GPIO input connected to CDONE pin
> +
> +  reset-gpios:
> +    maxItems: 1
> +    description:
> +      Active-low GPIO output connected to CRESET_B pin. Note that unless the
> +      GPIO is held low during startup, the FPGA will enter Master SPI mode and
> +      drive SCK with a clock signal potentially jamming other devices on the bus
> +      until the firmware is loaded.
> +
> +required:
> +  - compatible
> +  - reg
> +  - spi-max-frequency
> +  - cdone-gpios
> +  - reset-gpios
> +
> +additionalProperties: false

... and here unevaluatedProperties.

Best regards,
Krzysztof