Re: [PATCH] arm64: dts: qcom: kodiak: add coresight nodes

[Konrad Dybcio]

On 11/3/25 9:35 AM, Jie Gan wrote:
> Add TPDM, TPDA, CTI and funnel coresight devices for AOSS and QDSS
> blocks.
> 
> Signed-off-by: Jie Gan <jie.gan@xxxxxxxxxxxxxxxx>
> ---
>  arch/arm64/boot/dts/qcom/kodiak.dtsi | 290 +++++++++++++++++++++++++++++++++++
>  1 file changed, 290 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> index 3ef61af2ed8a..09aba1645408 100644
> --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
> +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> @@ -3338,6 +3338,85 @@ stm_out: endpoint {
>  			};
>  		};
>  
> +		tpda@6004000 {
> +			compatible = "qcom,coresight-tpda", "arm,primecell";
> +			reg = <0x0 0x06004000 0x0 0x1000>;
> +
> +			clocks = <&aoss_qmp>;
> +			clock-names = "apb_pclk";
> +
> +			in-ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				port@1c {
> +					reg = <28>;

Please use hex in 'reg' (just like you did in the unit address above)

> +					qdss_tpda_in28: endpoint {

and leave a \n between the last property and the following subnodes

[...]


> +		cti@6010000 {
> +			compatible = "arm,coresight-cti", "arm,primecell";
> +			reg = <0x0 0x06010000 0x0 0x1000>;
> +
> +			clocks = <&aoss_qmp>;
> +			clock-names = "apb_pclk";

I see 15 more CTI instances following this one at a 0x1000 stride,
followed by a TPIU at 0x06040000.

Actually a whole lot more debugging hardware. This patchset looks
tailored for debugging AOSS< as you briefly mentioned in the commit
message.

Would it be beneficial or useful to (perhaps in a separate series)
extend the support for those?

FWIW the various register bases and field sizes correspond to what I
can see in the docs, I can't speak for the port numbers. Please just
fix up the style issues I mentioned above.

Konrad