Re: [PATCH v3 1/2] dt-bindings: hwmon: ST TSC1641 power monitor

[Igor Reznichenko]

>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/interrupt-controller/irq.h>
>> +
>> +    i2c {
>> +        #address-cells = <1>;
>> +        #size-cells = <0>;
>> +
>> +        power-sensor@40 {
>> +            compatible = "st,tsc1641";
>> +            reg = <0x40>;
>> +            interrupt-parent = <&gpio1>;
>> +            interrupts = <1 IRQ_TYPE_LEVEL_LOW>; /* Polarity board dependent */
>> +            shunt-resistor-micro-ohms = <1000>;
>> +            st,alert-polarity-active-high;
>
>That's wrong IMO. Either you use it as SMBus alert or as CPU interrupt.
>If you use as CPU interrupt, then the flag in "interrupts" defines what
>is the level of this interrupt. That flag is a combination of both
>CPU/SoC side and any inverters on the device. And actually you wrote it
>already - "Polarity board dependent" - so why do you:
>1. Provide polarity twice
>2. Provide inconsistent values - alert interrupt is level low, but
>alert interrupt is also active (level) high. So level low or level high?

I tried to illustrate both in one example, but I can see how this is confusing.
Will it work if I split the interrupt part into separate example?

Thanks, Igor