Re: [PATCH 11/14] dt-bindings: spi: renesas,rzv2h-rspi: document RZ/T2H and RZ/N2H
From: Conor Dooley
Date: Fri Nov 07 2025 - 12:00:43 EST
On Thu, Nov 06, 2025 at 06:02:01PM +0000, Cosmin-Gabriel Tanislav wrote:
>
>
> > -----Original Message-----
> > From: Conor Dooley <conor@xxxxxxxxxx>
> > Sent: Thursday, November 6, 2025 7:58 PM
> > To: Cosmin-Gabriel Tanislav <cosmin-gabriel.tanislav.xa@xxxxxxxxxxx>
> > Cc: Fabrizio Castro <fabrizio.castro.jz@xxxxxxxxxxx>; Mark Brown <broonie@xxxxxxxxxx>; Rob Herring
> > <robh@xxxxxxxxxx>; Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>; Conor Dooley <conor+dt@xxxxxxxxxx>; Geert
> > Uytterhoeven <geert+renesas@xxxxxxxxx>; magnus.damm <magnus.damm@xxxxxxxxx>; Michael Turquette
> > <mturquette@xxxxxxxxxxxx>; Stephen Boyd <sboyd@xxxxxxxxxx>; Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>;
> > linux-spi@xxxxxxxxxxxxxxx; linux-renesas-soc@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-
> > kernel@xxxxxxxxxxxxxxx; linux-clk@xxxxxxxxxxxxxxx; Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
> > Subject: Re: [PATCH 11/14] dt-bindings: spi: renesas,rzv2h-rspi: document RZ/T2H and RZ/N2H
> >
> > On Wed, Nov 05, 2025 at 11:13:55AM +0200, Cosmin Tanislav wrote:
> > > The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have four SPI
> > > peripherals.
> > >
> > > Compared to the previously supported RZ/V2H, these SoCs have a smaller
> > > FIFO, no resets, and only two clocks: PCLKSPIn and PCLK. PCLKSPIn,
> > > being the clock from which the SPI transfer clock is generated, is the
> > > equivalent of the TCLK from V2H.
> > >
> > > Document them, and use RZ/T2H as a fallback for RZ/N2H as the SPIs are
> > > entirely compatible.
> > >
> > > Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@xxxxxxxxxxx>
> > > Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
> >
> > Why is this a v1 with my ack?
>
> I forgot to bump the version to V2. I've sent V3 afterwards to amend it.
Ah, I didnt notice that. Thanks.
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