Re: [Patch v9 10/12] perf/x86/intel: Update dyn_constranit base on PEBS event precise level

From: Peter Zijlstra
Date: Mon Nov 10 2025 - 04:03:26 EST


On Mon, Nov 10, 2025 at 08:23:55AM +0800, Mi, Dapeng wrote:

> > @@ -5536,6 +5540,14 @@ static void intel_pmu_check_dyn_constr(s
> > continue;
> > mask = hybrid(pmu, acr_cause_mask64) & GENMASK_ULL(INTEL_PMC_MAX_GENERIC - 1, 0);
> > break;
> > + case DYN_CONSTR_PEBS:
> > + if (x86_pmu.arch_pebs)
> > + mask = hybrid(pmu, arch_pebs_cap).counters;
> > + break;
> > + case DYN_CONSTR_PDIST:
> > + if (x86_pmu.arch_pebs)
> > + mask = hybrid(pmu, arch_pebs_cap).pdists;
> > + break;
> > default:
> > pr_warn("Unsupported dynamic constraint type %d\n", i);
> > }
>
> Yes, exactly. Thanks.

Excellent. Could you please double check and try the bits I have in
queue/perf/core ? I don't think I've got v6 hardware at hand.