RE: [PATCH 1/2] x86/resctrl: Add io_alloc_min_cbm_all interface for CBM reset

[Luck, Tony]

> Does the following option work for you?
>
> # echo "*=0" > /sys/fs/resctrl/info/L3/io_alloc_cbm
>
>
> Here,|*| represents all domains.
>
>
> This functionality was introduced when adding support for the*"mbm_event" assign mode* (see [1]).
> [1]https://lore.kernel.org/lkml/b894ad853e6757d40da1469bf9fca4c64684df65.1757108044.git.babu.moger@xxxxxxx/ <https://lore.kernel.org/lkml/b894ad853e6757d40da1469bf9fca4c64684df65.1757108044.git.babu.moger@xxxxxxx/> <https://lore.kernel.org/lkml/b894ad853e6757d40da1469bf9fca4c64684df65.1757108044.git.babu.moger@xxxxxxx/>
> Also, this needs to be done for all the settings like L3, MBA also SMBA.
>
> # echo "L3:*=f" > /sys/fs/resctrl/schemata
>
> # echo "MB:*=128" > /sys/fs/resctrl/schemata
>
> I’d like to hear from Reinette and Tony if this seems like an acceptable
> approach.
>
> Thanks

Babu,

It does look like a logical extension of the mbm_event assignment syntax.

But might be awkward to use if the system has asymmetric domains. We don't
currently. But if we wanted to support L2 cache allocation on hybrid platforms
with a mix of P-core and E-core, those have historically supported different
bit masks because the L2 caches may allow 12 bits for one core type and
16 for another. On such a platform:

# echo "L2:*=fff" > schemata

would work,. But

# echo "L2:*=ffff" > schemata

would try to set unimplemented bits on some cores and would fail.

-Tony