Re: [PATCH 2/2] arm64: dts: socfpga: add Agilex3 board

From: Niravkumar L Rabara
Date: Mon Nov 10 2025 - 21:22:50 EST




On 10/11/2025 8:37 pm, Dinh Nguyen wrote:


On 11/10/25 00:47, niravkumarlaxmidas.rabara@xxxxxxxxxx wrote:
From: Niravkumar L Rabara <niravkumarlaxmidas.rabara@xxxxxxxxxx>

Agilex3 SoCFPGA development kit is a small form factor board similar to
Agilex5 013b board.
Agilex3 SoCFPGA is derived from Agilex5 SoCFPGA, with the main difference
of CPU cores — Agilex3 has 2 cores compared to 4 in Agilex5.

Signed-off-by: Niravkumar L Rabara <niravkumarlaxmidas.rabara@xxxxxxxxxx>
---
Note:
This patch depends on the series: "Add iommu supports"
https://lore.kernel.org/all/ cover.1760486497.git.khairul.anuar.romli@xxxxxxxxxx/

Patch series "Add iommu supports" is applied to socfpga maintainer's tree
https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git/ log/?h=socfpga_dts_for_v6.19

  arch/arm64/boot/dts/intel/Makefile            |   1 +
  .../boot/dts/intel/socfpga_agilex3_socdk.dts  | 130 ++++++++++++++++++
  2 files changed, 131 insertions(+)
  create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts

diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/ intel/Makefile
index 391d5cbe50b3..a117268267ee 100644
--- a/arch/arm64/boot/dts/intel/Makefile
+++ b/arch/arm64/boot/dts/intel/Makefile
@@ -2,6 +2,7 @@
  dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \
                  socfpga_agilex_socdk.dtb \
                  socfpga_agilex_socdk_nand.dtb \
+                socfpga_agilex3_socdk.dtb \
                  socfpga_agilex5_socdk.dtb \
                  socfpga_agilex5_socdk_013b.dtb \
                  socfpga_agilex5_socdk_nand.dtb \
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts b/ arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts
new file mode 100644
index 000000000000..3280bdd49faa
--- /dev/null
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2025, Altera Corporation
+ */
+#include "socfpga_agilex5.dtsi"
+
+/ {
+    model = "SoCFPGA Agilex3 SoCDK";
+    compatible = "intel,socfpga-agilex3-socdk", "intel,socfpga-agilex5";
+
+    aliases {
+        serial0 = &uart0;
+        ethernet2 = &gmac2;
+    };
+
+    chosen {
+        stdout-path = "serial0:115200n8";
+    };
+
+    leds {
+        compatible = "gpio-leds";
+
+        led0 {
+            label = "hps_led0";
+            gpios = <&porta 1 GPIO_ACTIVE_HIGH>;
+        };
+
+        led1 {
+            label = "hps_led1";
+            gpios = <&porta 12 GPIO_ACTIVE_HIGH>;
+        };
+
+    };

You need the :

 cpus {
        /delete-node/ cpu@2;
        /delete-node/ cpu@3;
    };


Dinh

I tried this way Dinh, but it doesn't work in dts, compile gives error.
/delete-node/ cpu@2;
/delete-node/ cpu@3;
works correctly.

Anyway I will send v2 patch with a socfpga_agilex3.dtsi for Agilex3 silicon which include "socfpga_agilex5.dtsi" and delete the cpu2 and cpu3 in dtsi file instead of dts.

Thanks,
Nirav