Re: [PATCH 2/4] arm64: dts: intel: agilex5: Add USB3.1 support for Agilex5 SoCDK

[Krzysztof Kozlowski]

On Tue, Nov 11, 2025 at 02:18:46PM +0800, adrianhoyin.ng@xxxxxxxxxx wrote:
> From: Adrian Ng Ho Yin <adrianhoyin.ng@xxxxxxxxxx>
> 
> Add device tree nodes for the USB3.1 controller on the Agilex5 SoC
> and enable it on the SoCDK board. The USB3.1 block consists of a
> SoC-specific wrapper around the Synopsys DWC3 core that handles clock,
> reset, and address translation configuration.
> 
> The DWC3 core is described as a child of the wrapper to reflect the
> hardware hierarchy and comply with the DWC3 binding requirements.
> 
> This commit also disables the DWC2 USB controller node, as the daughter
> card does not support simultaneous operation of both USB controllers.
> 
> Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@xxxxxxxxxx>
> ---
>  .../arm64/boot/dts/intel/socfpga_agilex5.dtsi | 24 +++++++++++++++++++
>  .../boot/dts/intel/socfpga_agilex5_socdk.dts  |  9 ++++++-

DTS cannot be mixed here. You are targetting USB, so you cannot mix up
other subsystems.

Best regards,
Krzysztof