Re: [PATCH v4 10/14] cxl: Enable AMD Zen5 address translation using ACPI PRMT

[Robert Richter]

On 03.11.25 18:00:08, Dave Jiang wrote:
> On 11/3/25 11:47 AM, Robert Richter wrote:

> > +	/* Translate HPA range to SPA. */
> > +	hpa_range.start = base_spa = prm_cxl_dpa_spa(pci_dev, hpa_range.start);
> > +	hpa_range.end = prm_cxl_dpa_spa(pci_dev, hpa_range.end);
> > +
> > +	if (hpa_range.start == ULLONG_MAX || hpa_range.end == ULLONG_MAX) {
> > +		dev_dbg(cxld->dev.parent,
> > +			"CXL address translation: Failed to translate HPA range: %#llx-%#llx:%#llx-%#llx(%s)\n",
> > +			hpa_range.start, hpa_range.end, ctx->hpa_range.start,
> > +			ctx->hpa_range.end, dev_name(&cxld->dev));
> > +		return -ENXIO;
> > +	}
> > +
> > +	/*
> > +	 * Since translated addresses include the interleaving
> > +	 * offsets, align the range to 256 MB.
> > +	 */
> > +	hpa_range.start = ALIGN_DOWN(hpa_range.start, SZ_256M);
> > +	hpa_range.end = ALIGN(hpa_range.end, SZ_256M) - 1;
> > +
> > +	spa_len = range_len(&hpa_range);
> > +	if (!len || !spa_len || spa_len % len) {
> > +		dev_dbg(cxld->dev.parent,
> > +			"CXL address translation: HPA range not contiguous: %#llx-%#llx:%#llx-%#llx(%s)\n",
> > +			hpa_range.start, hpa_range.end, ctx->hpa_range.start,
> > +			ctx->hpa_range.end, dev_name(&cxld->dev));
> > +		return -ENXIO;
> > +	}
> > +
> > +	ways = spa_len / len;
> > +	gran = SZ_256;
>
> maybe init 'base' and 'base_hpa' here. Makes it easier to recall
> rather than having to go up to recall what it was.> +

I've ended up to initialize base variable close together for a better
context:

	/* Translate HPA range to SPA. */                           
	base = hpa_range.start;                                     
	hpa_range.start = prm_cxl_dpa_spa(pci_dev, hpa_range.start);
	hpa_range.end = prm_cxl_dpa_spa(pci_dev, hpa_range.end);    
	base_spa = hpa_range.start;                                 

Values change an thus it connot be init later.

-Robert