Re: [PATCH net-next 5/6] dpll: zl3073x: Cache all output properties in zl3073x_out
From: kernel test robot
Date: Tue Nov 11 2025 - 05:43:20 EST
Hi Ivan,
kernel test robot noticed the following build warnings:
[auto build test WARNING on net-next/main]
url: https://github.com/intel-lab-lkp/linux/commits/Ivan-Vecera/dpll-zl3073x-Store-raw-register-values-instead-of-parsed-state/20251111-020236
base: net-next/main
patch link: https://lore.kernel.org/r/20251110175818.1571610-6-ivecera%40redhat.com
patch subject: [PATCH net-next 5/6] dpll: zl3073x: Cache all output properties in zl3073x_out
config: sparc64-allmodconfig (https://download.01.org/0day-ci/archive/20251111/202511111809.FLxbtr0Z-lkp@xxxxxxxxx/config)
compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project 996639d6ebb86ff15a8c99b67f1c2e2117636ae7)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251111/202511111809.FLxbtr0Z-lkp@xxxxxxxxx/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Closes: https://lore.kernel.org/oe-kbuild-all/202511111809.FLxbtr0Z-lkp@xxxxxxxxx/
All warnings (new ones prefixed by >>):
>> drivers/dpll/zl3073x/dpll.c:1488:43: warning: variable 'name' is uninitialized when used here [-Wuninitialized]
1488 | "%s%u is driven by different DPLL\n", name,
| ^~~~
drivers/dpll/zl3073x/dpll.c:1467:18: note: initialize the variable 'name' to silence this warning
1467 | const char *name;
| ^
| = NULL
drivers/dpll/zl3073x/dpll.c:1651:28: warning: variable 'ref' set but not used [-Wunused-but-set-variable]
1651 | const struct zl3073x_ref *ref;
| ^
2 warnings generated.
vim +/name +1488 drivers/dpll/zl3073x/dpll.c
75a71ecc24125f9 Ivan Vecera 2025-07-04 1446
75a71ecc24125f9 Ivan Vecera 2025-07-04 1447 /**
75a71ecc24125f9 Ivan Vecera 2025-07-04 1448 * zl3073x_dpll_pin_is_registrable - check if the pin is registrable
75a71ecc24125f9 Ivan Vecera 2025-07-04 1449 * @zldpll: pointer to zl3073x_dpll structure
75a71ecc24125f9 Ivan Vecera 2025-07-04 1450 * @dir: pin direction
75a71ecc24125f9 Ivan Vecera 2025-07-04 1451 * @index: pin index
75a71ecc24125f9 Ivan Vecera 2025-07-04 1452 *
75a71ecc24125f9 Ivan Vecera 2025-07-04 1453 * Checks if the given pin can be registered to given DPLL. For both
75a71ecc24125f9 Ivan Vecera 2025-07-04 1454 * directions the pin can be registered if it is enabled. In case of
75a71ecc24125f9 Ivan Vecera 2025-07-04 1455 * differential signal type only P-pin is reported as registrable.
75a71ecc24125f9 Ivan Vecera 2025-07-04 1456 * And additionally for the output pin, the pin can be registered only
75a71ecc24125f9 Ivan Vecera 2025-07-04 1457 * if it is connected to synthesizer that is driven by given DPLL.
75a71ecc24125f9 Ivan Vecera 2025-07-04 1458 *
75a71ecc24125f9 Ivan Vecera 2025-07-04 1459 * Return: true if the pin is registrable, false if not
75a71ecc24125f9 Ivan Vecera 2025-07-04 1460 */
75a71ecc24125f9 Ivan Vecera 2025-07-04 1461 static bool
75a71ecc24125f9 Ivan Vecera 2025-07-04 1462 zl3073x_dpll_pin_is_registrable(struct zl3073x_dpll *zldpll,
75a71ecc24125f9 Ivan Vecera 2025-07-04 1463 enum dpll_pin_direction dir, u8 index)
75a71ecc24125f9 Ivan Vecera 2025-07-04 1464 {
75a71ecc24125f9 Ivan Vecera 2025-07-04 1465 struct zl3073x_dev *zldev = zldpll->dev;
75a71ecc24125f9 Ivan Vecera 2025-07-04 1466 bool is_diff, is_enabled;
75a71ecc24125f9 Ivan Vecera 2025-07-04 1467 const char *name;
75a71ecc24125f9 Ivan Vecera 2025-07-04 1468
75a71ecc24125f9 Ivan Vecera 2025-07-04 1469 if (dir == DPLL_PIN_DIRECTION_INPUT) {
b35db42141ccf2a Ivan Vecera 2025-11-10 1470 u8 ref_id = zl3073x_input_pin_ref_get(index);
b35db42141ccf2a Ivan Vecera 2025-11-10 1471 const struct zl3073x_ref *ref;
75a71ecc24125f9 Ivan Vecera 2025-07-04 1472
75a71ecc24125f9 Ivan Vecera 2025-07-04 1473 /* Skip the pin if the DPLL is running in NCO mode */
75a71ecc24125f9 Ivan Vecera 2025-07-04 1474 if (zldpll->refsel_mode == ZL_DPLL_MODE_REFSEL_MODE_NCO)
75a71ecc24125f9 Ivan Vecera 2025-07-04 1475 return false;
75a71ecc24125f9 Ivan Vecera 2025-07-04 1476
b35db42141ccf2a Ivan Vecera 2025-11-10 1477 name = "REF";
b35db42141ccf2a Ivan Vecera 2025-11-10 1478 ref = zl3073x_ref_state_get(zldev, ref_id);
b35db42141ccf2a Ivan Vecera 2025-11-10 1479 is_diff = zl3073x_ref_is_diff(ref);
b35db42141ccf2a Ivan Vecera 2025-11-10 1480 is_enabled = zl3073x_ref_is_enabled(ref);
75a71ecc24125f9 Ivan Vecera 2025-07-04 1481 } else {
75a71ecc24125f9 Ivan Vecera 2025-07-04 1482 /* Output P&N pair shares single HW output */
75a71ecc24125f9 Ivan Vecera 2025-07-04 1483 u8 out = zl3073x_output_pin_out_get(index);
75a71ecc24125f9 Ivan Vecera 2025-07-04 1484
75a71ecc24125f9 Ivan Vecera 2025-07-04 1485 /* Skip the pin if it is connected to different DPLL channel */
65b8e8e3bf41fda Ivan Vecera 2025-11-10 1486 if (zl3073x_dev_out_dpll_get(zldev, out) != zldpll->id) {
75a71ecc24125f9 Ivan Vecera 2025-07-04 1487 dev_dbg(zldev->dev,
75a71ecc24125f9 Ivan Vecera 2025-07-04 @1488 "%s%u is driven by different DPLL\n", name,
75a71ecc24125f9 Ivan Vecera 2025-07-04 1489 out);
75a71ecc24125f9 Ivan Vecera 2025-07-04 1490
75a71ecc24125f9 Ivan Vecera 2025-07-04 1491 return false;
75a71ecc24125f9 Ivan Vecera 2025-07-04 1492 }
75a71ecc24125f9 Ivan Vecera 2025-07-04 1493
11e61915b41b996 Ivan Vecera 2025-11-10 1494 name = "OUT";
65b8e8e3bf41fda Ivan Vecera 2025-11-10 1495 is_diff = zl3073x_dev_out_is_diff(zldev, out);
65b8e8e3bf41fda Ivan Vecera 2025-11-10 1496 is_enabled = zl3073x_dev_output_pin_is_enabled(zldev, index);
75a71ecc24125f9 Ivan Vecera 2025-07-04 1497 }
75a71ecc24125f9 Ivan Vecera 2025-07-04 1498
75a71ecc24125f9 Ivan Vecera 2025-07-04 1499 /* Skip N-pin if the corresponding input/output is differential */
75a71ecc24125f9 Ivan Vecera 2025-07-04 1500 if (is_diff && zl3073x_is_n_pin(index)) {
75a71ecc24125f9 Ivan Vecera 2025-07-04 1501 dev_dbg(zldev->dev, "%s%u is differential, skipping N-pin\n",
75a71ecc24125f9 Ivan Vecera 2025-07-04 1502 name, index / 2);
75a71ecc24125f9 Ivan Vecera 2025-07-04 1503
75a71ecc24125f9 Ivan Vecera 2025-07-04 1504 return false;
75a71ecc24125f9 Ivan Vecera 2025-07-04 1505 }
75a71ecc24125f9 Ivan Vecera 2025-07-04 1506
75a71ecc24125f9 Ivan Vecera 2025-07-04 1507 /* Skip the pin if it is disabled */
75a71ecc24125f9 Ivan Vecera 2025-07-04 1508 if (!is_enabled) {
75a71ecc24125f9 Ivan Vecera 2025-07-04 1509 dev_dbg(zldev->dev, "%s%u%c is disabled\n", name, index / 2,
75a71ecc24125f9 Ivan Vecera 2025-07-04 1510 zl3073x_is_p_pin(index) ? 'P' : 'N');
75a71ecc24125f9 Ivan Vecera 2025-07-04 1511
75a71ecc24125f9 Ivan Vecera 2025-07-04 1512 return false;
75a71ecc24125f9 Ivan Vecera 2025-07-04 1513 }
75a71ecc24125f9 Ivan Vecera 2025-07-04 1514
75a71ecc24125f9 Ivan Vecera 2025-07-04 1515 return true;
75a71ecc24125f9 Ivan Vecera 2025-07-04 1516 }
75a71ecc24125f9 Ivan Vecera 2025-07-04 1517
--
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