Re: [Patch v9 10/12] perf/x86/intel: Update dyn_constranit base on PEBS event precise level

[Peter Zijlstra]

On Tue, Nov 11, 2025 at 01:41:05PM +0800, Mi, Dapeng wrote:

> I tested the queue/perf/core code with a slight code refine on SPR/CWF/PTL.
> In summary, all things look good. The constraints validation passes on all
> these 3 platforms, no overlapped constraints are reported. Besides, perf
> counting/sampling (both legacy PEBS and arch-PEBS) works well, no issue is
> found.

Excellent, I pushed out to tip/perf/core.

> I did a slight change for the intel_pmu_check_dyn_constr() helper. It
> should be good enough to only validate the GP counters for the PEBS counter
> and PDIST constraint check. Beside the code style is refined
> opportunistically. Thanks.

If you could send that as a proper patch -- the thing was horribly
whitespace mangled.