Re: [PATCH v2 3/6] dt-bindings: display/msm/rgmu: Document A612 RGMU

[Krzysztof Kozlowski]

On 14/11/2025 13:08, Akhil P Oommen wrote:
> On 11/14/2025 5:30 PM, Akhil P Oommen wrote:
>> On 11/10/2025 1:21 PM, Krzysztof Kozlowski wrote:
>>> On Fri, Nov 07, 2025 at 02:20:08AM +0530, Akhil P Oommen wrote:
>>>> From: Jie Zhang <jie.zhang@xxxxxxxxxxxxxxxx>
>>>>
>>>> RGMU a.k.a Reduced Graphics Management Unit is a small state machine
>>>> with the sole purpose of providing IFPC (Inter Frame Power Collapse)
>>>> support. Compared to GMU, it doesn't manage GPU clock, voltage
>>>> scaling, bw voting or any other functionalities. All it does is detect
>>>> an idle GPU and toggle the GDSC switch. As it doesn't access DDR space,
>>>> it doesn't require iommu.
>>>>
>>>> So far, only Adreno 612 GPU has an RGMU core. Document RGMU in the GMU's
>>>> schema.
>>>>
>>>> Signed-off-by: Jie Zhang <jie.zhang@xxxxxxxxxxxxxxxx>
>>>> Signed-off-by: Akhil P Oommen <akhilpo@xxxxxxxxxxxxxxxx>
>>>> ---
>>>>  .../devicetree/bindings/display/msm/rgmu.yaml      | 131 +++++++++++++++++++++
>>>>  MAINTAINERS                                        |   1 +
>>>>  2 files changed, 132 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/display/msm/rgmu.yaml b/Documentation/devicetree/bindings/display/msm/rgmu.yaml
>>>> new file mode 100644
>>>> index 000000000000..7621556477d0
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/display/msm/rgmu.yaml
>>>
>>> Filename matching compatible, so qcom,adreno-rgmu.yaml
>>>
>>>
>>>> @@ -0,0 +1,131 @@
>>>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>>>> +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
>>>> +%YAML 1.2
>>>> +---
>>>> +
>>>> +$id: http://devicetree.org/schemas/display/msm/rgmu.yaml#
>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>>> +
>>>> +title: RGMU attached to certain Adreno GPUs
>>>> +
>>>> +maintainers:
>>>> +  - Rob Clark <robin.clark@xxxxxxxxxxxxxxxx>
>>>> +
>>>> +description: |
>>>
>>> Do not need '|' unless you need to preserve formatting.
>>>
>>>> +  RGMU (Reduced Graphics Management Unit) IP is present in some GPUs that
>>>> +  belong to Adreno A6xx family. It is a small state machine that helps to
>>>> +  toggle the GX GDSC (connected to CX rail) to implement IFPC feature and save
>>>> +  power.
>>>> +
>>>> +properties:
>>>> +  compatible:
>>>> +    items:
>>>> +      - const: qcom,adreno-rgmu-612.0
>>>> +      - const: qcom,adreno-rgmu
>>>> +
>>>> +  reg:
>>>> +    items:
>>>> +      - description: Core RGMU registers
>>>> +
>>>> +  reg-names:
>>>> +    items:
>>>> +      - const: gmu
>>>
>>> Drop reg-names, useless for one entry with same name as the block name.
>>
>> Just to confirm, drop only reg-names, but keep 'reg'?
> 
> Wait. We should keep 'reg'.
> 
> If we remove 'reg-names' here, we cannot use reg-names in DT too because
> we are setting additionalProperties to False, right?


Yes, I ask to drop reg-names from everywhere because they are pointless.

Best regards,
Krzysztof