Re: [kvm-unit-tests] x86/svm: Correctly extract the IP from LBR MSRs

[Sean Christopherson]

On Thu, 13 Nov 2025 22:46:39 +0000, Yosry Ahmed wrote:
> Currently, only bit 63 is ignored when reading LBR MSRs. However,
> different AMD CPUs use upper bits of the MSR differently. For example,
> some Zen 4 processors document bit 63 in LASTBRACNHFROMIP and bits 63:61
> in LASTBRANCHTOIP to be reserved. On the other hand, some Zen 5
> processors bits 63:57 to be reserved in both MSRs.
> 
> Use the common denominator and always bits 63:57 when reading the LBR
> MSRs, which should be sufficient testing. This fixes the test flaking on
> some AMD processors that set bit 62 in LASTBRANCHTOIP.
> 
> [...]

Applied to kvm-x86 next, thanks!

[1/1] x86/svm: Correctly extract the IP from LBR MSRs
      https://github.com/kvm-x86/kvm-unit-tests/commit/9a7a0e188bd7

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https://github.com/kvm-x86/kvm-unit-tests/tree/next