Re: [PATCH 2/2] soc: renesas: rz-sysc: Populate readable_reg/writeable_reg in regmap config

[Geert Uytterhoeven]

Hi Claudiu,

On Wed, 5 Nov 2025 at 08:05, Claudiu <claudiu.beznea@xxxxxxxxx> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
>
> Not all system controller registers are accessible from Linux. Accessing
> such registers generates synchronous external abort. Populate the
> readable_reg and writeable_reg members of the regmap config to inform the
> regmap core which registers can be accessed. The list will need to be
> updated whenever new system controller functionality is exported through
> regmap.
>
> Fixes: 2da2740fb9c8 ("soc: renesas: rz-sysc: Add syscon/regmap support")
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
> ---
>
> Changes in v2:
> - added all SYSC registers IP specific, except the SPI
>   registers on RZ/V2H and RZ/V2N as these are accessible only from EL3

Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-devel for v6.19.

> --- a/drivers/soc/renesas/r9a08g045-sysc.c
> +++ b/drivers/soc/renesas/r9a08g045-sysc.c

> @@ -18,7 +37,57 @@ static const struct rz_sysc_soc_id_init_data rzg3s_sysc_soc_id_init_data __initc
>         .specific_id_mask = GENMASK(27, 0),
>  };
>
> +static bool rzg3s_regmap_readable_reg(struct device *dev, unsigned int reg)
> +{
> +       switch (reg) {
> +       case SYS_XSPI_MAP_STAADD_CS0:
> +       case SYS_XSPI_MAP_ENDADD_CS0:
> +       case SYS_XSPI_MAP_STAADD_CS1:
> +       case SYS_XSPI_MAP_ENDADD_CS1:
> +       case SYS_GETH0_CFG:
> +       case SYS_GETH1_CFG:
> +       case SYS_PCIE_CFG:
> +       case SYS_PCIE_MON:
> +       case SYS_PCIE_ERR_MON:
> +       case SYS_PCIE_PHY:
> +       case SYS_I2C0_CFG:
> +       case SYS_I2C1_CFG:
> +       case SYS_I2C2_CFG:
> +       case SYS_I2C3_CFG:
> +       case SYS_I3C_CFG:
> +       case SYS_USB_PWRRDY:
> +       case SYS_PCIE_RST_RSM_B:
> +               return true;
> +       default:
> +               return false;
> +       }
> +}
> +
> +static bool rzg3s_regmap_writeable_reg(struct device *dev, unsigned int reg)
> +{
> +       switch (reg) {
> +       case SYS_XSPI_MAP_STAADD_CS0:
> +       case SYS_XSPI_MAP_ENDADD_CS0:
> +       case SYS_XSPI_MAP_STAADD_CS1:
> +       case SYS_XSPI_MAP_ENDADD_CS1:
> +       case SYS_PCIE_CFG:
> +       case SYS_PCIE_PHY:
> +       case SYS_I2C0_CFG:
> +       case SYS_I2C1_CFG:
> +       case SYS_I2C2_CFG:
> +       case SYS_I2C3_CFG:
> +       case SYS_I3C_CFG:
> +       case SYS_USB_PWRRDY:
> +       case SYS_PCIE_RST_RSM_B:
> +               return true;
> +       default:
> +               return false;
> +       }
> +}

As all the writeable regs are a subset of the readable regs, do you
think it would be worthwhile to write e.g.

    static bool rzg3s_regmap_readable_reg(struct device *dev, unsigned int reg)
    {
            if (rzg3s_regmap_writeable_reg(dev, reg))
                    return true;

            switch (reg) {
            case SYS_GETH0_CFG:
            case SYS_GETH1_CFG:
            case SYS_PCIE_MON:
            case SYS_PCIE_ERR_MON:
                    return true;
            default:
                    return false;
            }
    }

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds