Re: [PATCH 1/2] dt-bindings: clock: sprd,sc9860-clk: Allow "reg" for gate clocks

[Rob Herring]

On Wed, Oct 29, 2025 at 10:56:13AM -0500, Rob Herring (Arm) wrote:
> The gate bindings have an artificial split between a "syscon" and clock
> provider node. Allow "reg" properties so this split can be removed.
> 
> Signed-off-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
> ---
>  .../bindings/clock/sprd,sc9860-clk.yaml       | 26 -------------------
>  1 file changed, 26 deletions(-)

Ping!

> 
> diff --git a/Documentation/devicetree/bindings/clock/sprd,sc9860-clk.yaml b/Documentation/devicetree/bindings/clock/sprd,sc9860-clk.yaml
> index 502cd723511f..b131390207d6 100644
> --- a/Documentation/devicetree/bindings/clock/sprd,sc9860-clk.yaml
> +++ b/Documentation/devicetree/bindings/clock/sprd,sc9860-clk.yaml
> @@ -114,25 +114,6 @@ allOf:
>          - reg
>        properties:
>          sprd,syscon: false
> -  - if:
> -      properties:
> -        compatible:
> -          contains:
> -            enum:
> -              - sprd,sc9860-agcp-gate
> -              - sprd,sc9860-aon-gate
> -              - sprd,sc9860-apahb-gate
> -              - sprd,sc9860-apapb-gate
> -              - sprd,sc9860-cam-gate
> -              - sprd,sc9860-disp-gate
> -              - sprd,sc9860-pll
> -              - sprd,sc9860-pmu-gate
> -              - sprd,sc9860-vsp-gate
> -    then:
> -      required:
> -        - sprd,syscon
> -      properties:
> -        reg: false
>  
>  additionalProperties: false
>  
> @@ -142,13 +123,6 @@ examples:
>        #address-cells = <2>;
>        #size-cells = <2>;
>  
> -      pmu-gate {
> -        compatible = "sprd,sc9860-pmu-gate";
> -        clocks = <&ext_26m>;
> -        #clock-cells = <1>;
> -        sprd,syscon = <&pmu_regs>;
> -      };
> -
>        clock-controller@20000000 {
>          compatible = "sprd,sc9860-ap-clk";
>          reg = <0 0x20000000 0 0x400>;
> -- 
> 2.51.0
>