Re: [PATCH v3 2/2] arm64: dts: qcom: Add PCIe3 and PCIe5 regulators for HAMAO-IOT-EVK board

From: Ziyue Zhang

Date: Tue Nov 18 2025 - 05:18:15 EST



On 11/13/2025 5:16 AM, Dmitry Baryshkov wrote:
On Wed, Nov 12, 2025 at 05:03:16PM +0800, Ziyue Zhang wrote:
HAMAO IoT EVK uses PCIe5 to connect an SDX65 module for WWAN functionality
and PCIe3 to connect a SATA controller. These interfaces require multiple
voltage rails: PCIe5 needs 3.3V supplied by vreg_wwan, while PCIe3 requires
12V, 3.3V, and 3.3V AUX rails, controlled via PMIC GPIOs.

Add the required fixed regulators with related pin configuration, and
connect them to the PCIe3 and PCIe5 ports to ensure proper power for the
SDX65 module and SATA controller.

Signed-off-by: Ziyue Zhang <ziyue.zhang@xxxxxxxxxxxxxxxx>
Reviewed-by: Krishna Chaitanya Chundru <krishna.chundru@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 83 ++++++++++++++++++++++
1 file changed, 83 insertions(+)

+&pmc8380_3_gpios {
+ pm_sde7_aux_3p3_en: pcie-aux-3p3-default-state {
What is sde7? Other than that:


Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>

Hi Dmitry

I’m not sure what “sde7” refers to specifically. I saw this name in the

schematic, and the pin is labeled PM_SDE7_AUX_3P3, so I used that naming

in the DT.


BRs

Ziyue


+ pins = "gpio8";
+ function = "normal";
+ output-enable;
+ output-high;
+ bias-pull-down;
+ power-source = <0>;
+ };
+
+ pm_sde7_main_3p3_en: pcie-main-3p3-default-state {
+ pins = "gpio6";
+ function = "normal";
+ output-enable;
+ output-high;
+ bias-pull-down;
+ power-source = <0>;
+ };
+};
+
&pmc8380_5_gpios {
usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {
pins = "gpio8";
--
2.34.1