RE: [PATCH v9 6/6] phy: exynos5-usbdrd: support SS combo phy for ExynosAutov920
From: Pritam Manohar Sutar
Date: Fri Nov 21 2025 - 03:11:16 EST
Hi Vinod,
> -----Original Message-----
> From: Vinod Koul <vkoul@xxxxxxxxxx>
> Sent: 20 November 2025 10:08 PM
> To: Pritam Manohar Sutar <pritam.sutar@xxxxxxxxxxx>
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> Subject: Re: [PATCH v9 6/6] phy: exynos5-usbdrd: support SS combo phy for
> ExynosAutov920
>
> On 10-10-25, 12:39, Pritam Manohar Sutar wrote:
> > Add required change in phy driver to support combo SS phy for this SoC.
>
> what is the 'required change', would be good to describe.
>
Can you please confirm if commit message is described as below?
"
phy: exynos5-usbdrd: support SS combo phy for ExynosAutov920
Update phy driver to enable SS combo phy for this SoC. New register
definitions, init/reset helper functions and a dedicated PHY
configuration structure are added. Add these changes in driver
to support combo SS phy for this SoC.
"
> --
> ~Vinod
Thank you,
Regards,
Pritam