Re: [PATCH v4 01/11] x86/bhi: x86/vmscape: Move LFENCE out of clear_bhb_loop()

From: Pawan Gupta

Date: Thu Nov 20 2025 - 11:56:07 EST


On Thu, Nov 20, 2025 at 06:15:32PM +0200, Nikolay Borisov wrote:
>
>
> On 11/20/25 08:17, Pawan Gupta wrote:
> > Currently, BHB clearing sequence is followed by an LFENCE to prevent
> > transient execution of subsequent indirect branches prematurely. However,
> > LFENCE barrier could be unnecessary in certain cases. For example, when
> > kernel is using BHI_DIS_S mitigation, and BHB clearing is only needed for
> > userspace. In such cases, LFENCE is redundant because ring transitions
> > would provide the necessary serialization.
> >
> > Below is a quick recap of BHI mitigation options:
> >
> > On Alder Lake and newer
> >
> > - BHI_DIS_S: Hardware control to mitigate BHI in ring0. This has low
> > performance overhead.
> > - Long loop: Alternatively, longer version of BHB clearing sequence
> > on older processors can be used to mitigate BHI. This
> > is not yet implemented in Linux.
>
> I find this description of the Long loop on "ALder lake and newer" somewhat
> confusing, as you are also referring "older processors". Shouldn't the
> longer sequence bet moved under "On older CPUs" heading? Or perhaps it must
> be expanded to say that the long sequence could work on Alder Lake and newer
> CPUs as well as on older cpus?

Ya, it needs to be rephrased. Would dropping "on older processors" help?

- Long loop: Alternatively, longer version of BHB clearing sequence
can be used to mitigate BHI. This is not yet implemented
in Linux.

> >
> > On older CPUs
> >
> > - Short loop: Clears BHB at kernel entry and VMexit.

And also talk about "Long loop" effectiveness here:

On older CPUs

- Short loop: Clears BHB at kernel entry and VMexit. The "Long loop"
is effective on older CPUs as well, but should be avoided
because of unnecessary overhead.
> <snip>