Re: (subset) [PATCH v3 2/4] clk: samsung: Add clock PLL support for ARTPEC-9 SoC

[Krzysztof Kozlowski]

On Wed, 29 Oct 2025 18:37:29 +0530, Ravi Patel wrote:
> Add below clock PLL support for Axis ARTPEC-9 SoC platform:
> - pll_a9fracm: Integer PLL with mid frequency FVCO (800 to 6400 MHz)
>              This is used in ARTPEC-9 SoC for shared PLL
> 
> - pll_a9fraco: Integer/Fractional PLL with mid frequency FVCO
>              (600 to 2400 MHz)
>              This is used in ARTPEC-9 SoC for Audio PLL
> 
> [...]

Applied, thanks!

[2/4] clk: samsung: Add clock PLL support for ARTPEC-9 SoC
      (no commit info)

Best regards,
-- 
Krzysztof Kozlowski <krzk@xxxxxxxxxx>