Re: [PATCH net v2] net: aquantia: Add missing descriptor cache invalidation on ATL2

[Simon Horman]

On Thu, Nov 20, 2025 at 12:15:33PM +0800, Kai-Heng Feng wrote:
> ATL2 hardware was missing descriptor cache invalidation in hw_stop(),
> causing SMMU translation faults during device shutdown and module removal:
> [   70.355743] arm-smmu-v3 arm-smmu-v3.5.auto: event 0x10 received:
> [   70.361893] arm-smmu-v3 arm-smmu-v3.5.auto:  0x0002060000000010
> [   70.367948] arm-smmu-v3 arm-smmu-v3.5.auto:  0x0000020000000000
> [   70.374002] arm-smmu-v3 arm-smmu-v3.5.auto:  0x00000000ff9bc000
> [   70.380055] arm-smmu-v3 arm-smmu-v3.5.auto:  0x0000000000000000
> [   70.386109] arm-smmu-v3 arm-smmu-v3.5.auto: event: F_TRANSLATION client: 0001:06:00.0 sid: 0x20600 ssid: 0x0 iova: 0xff9bc000 ipa: 0x0
> [   70.398531] arm-smmu-v3 arm-smmu-v3.5.auto: unpriv data write s1 "Input address caused fault" stag: 0x0
> 
> Commit 7a1bb49461b1 ("net: aquantia: fix potential IOMMU fault after
> driver unbind") and commit ed4d81c4b3f2 ("net: aquantia: when cleaning
> hw cache it should be toggled") fixed cache invalidation for ATL B0, but
> ATL2 was left with only interrupt disabling. This allowed hardware to
> write to cached descriptors after DMA memory was unmapped, triggering
> SMMU faults. Once cache invalidation is applied to ATL2, the translation
> fault can't be observed anymore.
> 
> Add shared aq_hw_invalidate_descriptor_cache() helper and use it in both
> ATL B0 and ATL2 hw_stop() implementations for consistent behavior.
> 
> Fixes: e54dcf4bba3e ("net: atlantic: basic A2 init/deinit hw_ops")
> Tested-by: Carol Soto <csoto@xxxxxxxxxx>
> Signed-off-by: Kai-Heng Feng <kaihengf@xxxxxxxxxx>

Thanks for addressing my review of v1.

Reviewed-by: Simon Horman <horms@xxxxxxxxxx>