Re: [PATCH v2] drm/msm: add PERFCTR_CNTL to ifpc_reglist
From: Dmitry Baryshkov
Date: Wed Nov 26 2025 - 16:42:45 EST
On Wed, Nov 26, 2025 at 10:31:30PM +0100, Anna Maniscalco wrote:
> Previously this register would become 0 after IFPC took place which
> broke all usages of counters.
>
> Fixes: a6a0157cc68e ("drm/msm/a6xx: Enable IFPC on Adreno X1-85")
> Signed-off-by: Anna Maniscalco <anna.maniscalco2000@xxxxxxxxx>
> ---
> Changes in v2:
> - Added Fixes tag
Cc: stable@xxxxxxxxxxxxxxx
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>
> - Link to v1: https://lore.kernel.org/r/20251126-ifpc_counters-v1-1-f2d5e7048032@xxxxxxxxx
> ---
> drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 1 +
> 1 file changed, 1 insertion(+)
>
--
With best wishes
Dmitry