Re: [PATCH v4 2/4] clk: qcom: rpmh: Add support for Kaanapali rpmh clocks

[Dmitry Baryshkov]

On Wed, Nov 26, 2025 at 03:27:16PM +0530, Taniya Das wrote:
> Add the RPMH clocks present in Kaanapali SoC.
> 
> Signed-off-by: Taniya Das <taniya.das@xxxxxxxxxxxxxxxx>
> ---
>  drivers/clk/qcom/clk-rpmh.c | 41 +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
> 
> diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
> index a2185a6f321fb60ddc9272582ed67fa9ada6535e..bb2cbd2961d9aa1e4475d5876c1761dbbffe5338 100644
> --- a/drivers/clk/qcom/clk-rpmh.c
> +++ b/drivers/clk/qcom/clk-rpmh.c
> @@ -395,6 +395,18 @@ DEFINE_CLK_RPMH_VRM(clk4, _a1_e0, "C4A_E0", 1);
>  DEFINE_CLK_RPMH_VRM(clk5, _a1_e0, "C5A_E0", 1);
>  DEFINE_CLK_RPMH_VRM(clk8, _a1_e0, "C8A_E0", 1);
>  
> +DEFINE_CLK_RPMH_VRM(clk1, _a1_e0, "C1A_E0", 1);
> +DEFINE_CLK_RPMH_VRM(clk2, _a1_e0, "C2A_E0", 1);

So, why are these two clocks placed here and not few lines above, before
clk3_a1_e0?

> +
> +DEFINE_CLK_RPMH_VRM(clk3, _a2_e0, "C3A_E0", 2);
> +DEFINE_CLK_RPMH_VRM(clk4, _a2_e0, "C4A_E0", 2);
-- 
With best wishes
Dmitry