Re: [PATCH v5 2/4] phy: qcom: edp: Fix the DP_PHY_AUX_CFG registers count

From: Dmitry Baryshkov

Date: Fri Dec 05 2025 - 15:14:48 EST


On Fri, Dec 05, 2025 at 04:23:21PM +0200, Abel Vesa wrote:
> From: Abel Vesa <abel.vesa@xxxxxxxxxx>
>
> On all platforms supported by this driver, there are 13 DP_PHY_AUX_CFGx
> registers. This hasn't been an issue so far on currently supported
> platforms, because the init sequence never spanned beyond DP_PHY_AUX_CFG9.
>
> However, on the new upcoming Glymur platform, these are updated along
> with the rest of the init sequence.
>
> So update the size of the array holding the config to 13.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxxxxxxxx>
> ---
> drivers/phy/qualcomm/phy-qcom-edp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>


--
With best wishes
Dmitry