Re: [PATCH net] net: dsa: mxl-gsw1xx: manually clear RANEG bit
From: Andrew Lunn
Date: Fri Dec 05 2025 - 09:06:54 EST
On Fri, Dec 05, 2025 at 01:56:39PM +0000, Daniel Golle wrote:
> On Fri, Dec 05, 2025 at 02:45:35PM +0100, Andrew Lunn wrote:
> > On Fri, Dec 05, 2025 at 01:32:20AM +0000, Daniel Golle wrote:
> > > Despite being documented as self-clearing, the RANEG bit sometimes
> > > remains set, preventing auto-negotiation from happening.
> > >
> > > Manually clear the RANEG bit after 10ms as advised by MaxLinear, using
> > > delayed_work emulating the asynchronous self-clearing behavior.
> >
> > Maybe add some text why the complexity of delayed work is used, rather
> > than just a msleep(10)?
> >
> > Calling regmap_read_poll_timeout() to see if it clears itself could
> > optimise this, and still be simpler.
>
> Is the restart_an() operation allowed to sleep?
This would typically be an MDIO operations, since PCS are often on an
MDIO bus. And MDIO is expected to sleep. Also, regmap is using a lock
to prevent parallel access, and i expect that is a sleeping lock, not
a spinlock.
If you want to be sure, put in a might_sleep() call, and build the
kernel will sleep in atomic debug enabled. You will get a splat if i'm
wrong.
Andrew