RE: [PATCH 2/2] x86/resctrl: Fix memory bandwidth counter width for Hygon

[Luck, Tony]

> The default Memory Bandwidth Monitoring (MBM) counter width is 24 bits.
> Hygon CPUs provide a 32-bit width counter, but they do not support the
> MBM capability CPUID leaf (0xF.[ECX=1]:EAX) to report the width offset
> (from 24 bits).
>
> Consequently, the kernel falls back to the 24-bit default counter width,
> which causes incorrect overflow handling on Hygon CPUs.

I *think* you'd get the right results if the h/w counter is wider
than s/w expects. You'd just need to keep polling fast enough
(and we never adjusted the MBM polling rate from the original
1 HZ.)

> Fix this by explicitly setting the counter width offset to 8 bits
> (resulting in a 32-bit total counter width) for Hygon CPUs.

But the patch looks good.

Reviewed-by: Tony Luck <tony.luck@xxxxxxxxx>