[no subject]
From: Unknown
Date: Mon Dec 08 2025 - 22:35:02 EST
-
From: Qing Chang +ADw-qinchang+AEA-cisco.com+AD4-
Date: Sun, 30 Nov 2025 19:30:36 -0800
Subject: +AFs-PATCH+AF0- i2c: piix4: Add support for I2C block data transac=
tions
Add support for I2C+AF8-SMBUS+AF8-I2C+AF8-BLOCK+AF8-DATA protocol to the PI=
IX4 SMBus
driver. This enables I2C block read/write operations where the master
specifies the transfer length, unlike SMBus block data where the slave
provides the length.
Key changes:
- Add PIIX4+AF8-I2C+AF8-BLOCK+AF8-DATA protocol constant (0x18)
- Implement I2C block write: first data byte to SMBHSTDAT0, rest to SMBBLKD=
AT
- Implement I2C block read: pre-specify length, read first byte from
SMBHSTDAT0, rest from SMBBLKDAT
- Update piix4+AF8-func() to advertise I2C+AF8-FUNC+AF8-SMBUS+AF8-I2C+AF8-B=
LOCK support
- Add IMC notification for SB800 series chips
Signed-off-by: Qing Chang +ADw-qinchang+AEA-cisco.com+AD4-
---
drivers/i2c/busses/i2c-piix4.c +AHw- 44 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-=
+-+-+-+-+-+-+-+-+-+-+-+-+-+----
drivers/i2c/busses/i2c-piix4.h +AHw- 3 +-+--
2 files changed, 43 insertions(+-), 4 deletions(-)
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.=
c
index ac3bb550303f..778ff169b138 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+-+-+- b/drivers/i2c/busses/i2c-piix4.c
+AEAAQA- -649,6 +-649,28 +AEAAQA- static s32 piix4+AF8-access(struct i2c+AF=
8-adapter +ACo- adap, u16 addr,
+AH0-
size +AD0- PIIX4+AF8-BLOCK+AF8-DATA+ADs-
break+ADs-
+- case I2C+AF8-SMBUS+AF8-I2C+AF8-BLOCK+AF8-DATA:
+- outb+AF8-p((addr +ADwAPA- 1) +AHw- read+AF8-write,
+- SMBHSTADD)+ADs-
+- outb+AF8-p(command, SMBHSTCMD)+ADs-
+- if (read+AF8-write +AD0APQ- I2C+AF8-SMBUS+AF8-WRITE) +AHs-
+- len +AD0- data-+AD4-block+AFs-0+AF0AOw-
+- if (len +AD0APQ- 0 +AHwAfA- len +AD4- I2C+AF8-SMBU=
S+AF8-BLOCK+AF8-MAX +- 1)
+- return -EINVAL+ADs-
+- /+ACo- For I2C block write, first byte goes to SMB=
HSTDAT0 +ACo-/
+- outb+AF8-p(data-+AD4-block+AFs-1+AF0-, SMBHSTDAT0)=
+ADs-
+- inb+AF8-p(SMBHSTCNT)+ADs- /+ACo- Reset SMBBL=
KDAT +ACo-/
+- /+ACo- Write remaining bytes to SMBBLKDAT +ACo-/
+- for (i +AD0- 2+ADs- i +ADwAPQ- len+ADs- i+-+-)
+- outb+AF8-p(data-+AD4-block+AFs-i+AF0-, SMB=
BLKDAT)+ADs-
+- +AH0- else +AHs-
+- /+ACo- For I2C block read, length is pre-specified=
by caller +ACo-/
+- len +AD0- data-+AD4-block+AFs-0+AF0AOw-
+- if (len +AD0APQ- 0 +AHwAfA- len +AD4- I2C+AF8-SMBU=
S+AF8-BLOCK+AF8-MAX +- 1)
+- return -EINVAL+ADs-
+- +AH0-
+- size +AD0- PIIX4+AF8-I2C+AF8-BLOCK+AF8-DATA+ADs-
+- break+ADs-
default:
dev+AF8-warn(+ACY-adap-+AD4-dev, +ACI-Unsupported transacti=
on +ACU-d+AFw-n+ACI-, size)+ADs-
return -EOPNOTSUPP+ADs-
+AEAAQA- -680,6 +-702,18 +AEAAQA- static s32 piix4+AF8-access(struct i2c+AF=
8-adapter +ACo- adap, u16 addr,
for (i +AD0- 1+ADs- i +ADwAPQ- data-+AD4-block+AFs-0+AF0AOw=
- i+-+-)
data-+AD4-block+AFs-i+AF0- +AD0- inb+AF8-p(SMBBLKDA=
T)+ADs-
break+ADs-
+- case PIIX4+AF8-I2C+AF8-BLOCK+AF8-DATA:
+- /+ACo- For I2C block read, the length was pre-specified +A=
Co-/
+- len +AD0- data-+AD4-block+AFs-0+AF0AOw-
+- if (len +AD0APQ- 0 +AHwAfA- len +AD4- I2C+AF8-SMBUS+AF8-BL=
OCK+AF8-MAX +- 1)
+- return -EPROTO+ADs-
+- /+ACo- First byte of data is in SMBHSTDAT0, not a count +A=
Co-/
+- data-+AD4-block+AFs-1+AF0- +AD0- inb+AF8-p(SMBHSTDAT0)+ADs=
-
+- inb+AF8-p(SMBHSTCNT)+ADs- /+ACo- Reset SMBBLKDAT +AC=
o-/
+- /+ACo- Read remaining bytes from SMBBLKDAT +ACo-/
+- for (i +AD0- 2+ADs- i +ADwAPQ- len+ADs- i+-+-)
+- data-+AD4-block+AFs-i+AF0- +AD0- inb+AF8-p(SMBBLKD=
AT)+ADs-
+- break+ADs-
+AH0-
return 0+ADs-
+AH0-
+AEAAQA- -819,7 +-853,9 +AEAAQA- static s32 piix4+AF8-access+AF8-sb800(stru=
ct i2c+AF8-adapter +ACo-adap, u16 addr,
+ACo- Therefore we need to request the ownership flag during those
+ACo- transactions.
+ACo-/
- if ((size +AD0APQ- I2C+AF8-SMBUS+AF8-BLOCK+AF8-DATA) +ACYAJg- adapd=
ata-+AD4-notify+AF8-imc) +AHs-
+- if ((size +AD0APQ- I2C+AF8-SMBUS+AF8-BLOCK+AF8-DATA +AHwAfA-
+- size +AD0APQ- I2C+AF8-SMBUS+AF8-I2C+AF8-BLOCK+AF8-DATA) +ACYA=
Jg-
+- adapdata-+AD4-notify+AF8-imc) +AHs-
int ret+ADs-
ret +AD0- piix4+AF8-imc+AF8-sleep()+ADs-
+AEAAQA- -855,7 +-891,9 +AEAAQA- static s32 piix4+AF8-access+AF8-sb800(stru=
ct i2c+AF8-adapter +ACo-adap, u16 addr,
/+ACo- Release the semaphore +ACo-/
outb+AF8-p(smbslvcnt +AHw- 0x20, SMBSLVCNT)+ADs-
- if ((size +AD0APQ- I2C+AF8-SMBUS+AF8-BLOCK+AF8-DATA) +ACYAJg- adapd=
ata-+AD4-notify+AF8-imc)
+- if ((size +AD0APQ- I2C+AF8-SMBUS+AF8-BLOCK+AF8-DATA +AHwAfA-
+- size +AD0APQ- I2C+AF8-SMBUS+AF8-I2C+AF8-BLOCK+AF8-DATA) +ACYA=
Jg-
+- adapdata-+AD4-notify+AF8-imc)
piix4+AF8-imc+AF8-wakeup()+ADs-
release:
+AEAAQA- -867,7 +-905,7 +AEAAQA- static u32 piix4+AF8-func(struct i2c+AF8-a=
dapter +ACo-adapter)
+AHs-
return I2C+AF8-FUNC+AF8-SMBUS+AF8-QUICK +AHw- I2C+AF8-FUNC+AF8-SMBU=
S+AF8-BYTE +AHw-
I2C+AF8-FUNC+AF8-SMBUS+AF8-BYTE+AF8-DATA +AHw- I2C+AF8-FUNC+AF8=
-SMBUS+AF8-WORD+AF8-DATA +AHw-
- I2C+AF8-FUNC+AF8-SMBUS+AF8-BLOCK+AF8-DATA+ADs-
+- I2C+AF8-FUNC+AF8-SMBUS+AF8-BLOCK+AF8-DATA +AHw- I2C+AF8-FUNC+A=
F8-SMBUS+AF8-I2C+AF8-BLOCK+ADs-
+AH0-
static const struct i2c+AF8-algorithm smbus+AF8-algorithm +AD0- +AHs-
diff --git a/drivers/i2c/busses/i2c-piix4.h b/drivers/i2c/busses/i2c-piix4.=
h
index 36bc6ce82a27..6311af3ca661 100644
--- a/drivers/i2c/busses/i2c-piix4.h
+-+-+- b/drivers/i2c/busses/i2c-piix4.h
+AEAAQA- -29,7 +-29,8 +AEAAQA-
+ACM-define SMBSLVDAT (0x0C +- piix4+AF8-smba)
/+ACo- PIIX4 constants +ACo-/
-+ACM-define PIIX4+AF8-BLOCK+AF8-DATA 0x14
+-+ACM-define PIIX4+AF8-BLOCK+AF8-DATA 0x14
+-+ACM-define PIIX4+AF8-I2C+AF8-BLOCK+AF8-DATA 0x18
struct sb800+AF8-mmio+AF8-cfg +AHs-
void +AF8AXw-iomem +ACo-addr+ADs-
--
2.35.6