Re: [PATCH v3 4/7] spi: axi-spi-engine: support SPI_MULTI_LANE_MODE_STRIPE

[David Lechner]

On 12/2/25 8:53 AM, Andy Shevchenko wrote:
> On Mon, Dec 01, 2025 at 08:20:42PM -0600, David Lechner wrote:
>> Add support for SPI_MULTI_LANE_MODE_STRIPE to the AXI SPI engine driver.
>>
>> The v2.0.0 version of the AXI SPI Engine IP core supports multiple
>> lanes. This can be used with SPI_MULTI_LANE_MODE_STRIPE to support
>> reading from simultaneous sampling ADCs that have a separate SDO line
>> for each analog channel. This allows reading all channels at the same
>> time to increase throughput.
> 
> ...
> 
>> +static u8 spi_engine_all_lane_flags(struct spi_device *spi)
>> +{
>> +	u8 flags = 0;
> 
>> +	int i;
> 
> Why signed?

Because it is conventional.

> 
>> +	for (i = 0; i < spi->num_data_lanes; i++)
>> +		flags |= BIT(spi->data_lanes[i]);
>> +
>> +	return flags;
>> +}
> 
> ...
> 
>>  static void spi_engine_gen_xfer(struct spi_engine_program *p, bool dry,
>> -	struct spi_transfer *xfer)
>> +				struct spi_transfer *xfer, u32 num_lanes)
> 
> Side note: this bool parameter makes code harder to follow. And now we have
> pointers and integers/booleans to be interleaved. Perhaps reconsider the order
> of the parameters (and ideally get rid of boolean by making two distinct
> functions?).

There would be significant code duplication if we split this
which would make it error prone.

Perhaps a bit unusual parameter ordering according to data type,
but they are grouped logically, so I think it is OK. `dry` affects
what is written to `p` and `num_lanes` supplements `xfer`.

> 
> ...
> 
>>  	version = readl(spi_engine->base + ADI_AXI_REG_VERSION);
>> -	if (ADI_AXI_PCORE_VER_MAJOR(version) != 1) {
>> +	if (ADI_AXI_PCORE_VER_MAJOR(version) > 2) {
> 
> But this includes v0 as well!

I think it is OK. There was never a version 0 released, nor
is one expected.

> 
>>  	}
>