[PATCH v3 3/5] dt-bindings: remoteproc: qcom,pas: Document pas for SoCCP on Kaanapali and Glymur platforms
From: Jingyi Wang
Date: Tue Dec 23 2025 - 04:14:23 EST
Document the component used to boot SoCCP on Kaanapali SoC and add
compatible for Glymur SoCCP which could fallback to Kaanapali. Extend
the "qcom,smem-states", "qcom,smem-state-names", "interrupts" and
"interrupt-names" properties in the pas-common.
Co-developed-by: Sibi Sankar <sibi.sankar@xxxxxxxxxxxxxxxx>
Signed-off-by: Sibi Sankar <sibi.sankar@xxxxxxxxxxxxxxxx>
Signed-off-by: Jingyi Wang <jingyi.wang@xxxxxxxxxxxxxxxx>
---
.../remoteproc/qcom,kaanapali-soccp-pas.yaml | 134 +++++++++++++++++++++
.../bindings/remoteproc/qcom,pas-common.yaml | 28 +++--
2 files changed, 155 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,kaanapali-soccp-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,kaanapali-soccp-pas.yaml
new file mode 100644
index 000000000000..bd94ab9a3da4
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,kaanapali-soccp-pas.yaml
@@ -0,0 +1,134 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/qcom,kaanapali-soccp-pas.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Kaanapali SoCCP Peripheral Authentication Service
+
+maintainers:
+ - Jingyi Wang <jingyi.wang@xxxxxxxxxxxxxxxx>
+
+description:
+ The SoC Control Processor (SoCCP) is small RISC-V MCU that controls USB
+ Type-C, battery charging and various other functions on Qualcomm SoCs, somewhat
+ analogous to traditional PC Embedded Controllers. This document describes
+ the Peripheral Authentication Service loads and boots firmware for SoCCP.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - qcom,glymur-soccp-pas
+ - const: qcom,kaanapali-soccp-pas
+ - enum:
+ - qcom,kaanapali-soccp-pas
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: XO clock
+
+ clock-names:
+ items:
+ - const: xo
+
+ power-domains:
+ items:
+ - description: CX power domain
+ - description: MX power domain
+
+ power-domain-names:
+ items:
+ - const: cx
+ - const: mx
+
+ firmware-name:
+ items:
+ - description: Firmware name of the Hexagon core
+ - description: Firmware name of the Hexagon Devicetree
+
+ memory-region:
+ items:
+ - description: Memory region for main Firmware authentication
+ - description: Memory region for Devicetree Firmware authentication
+
+required:
+ - compatible
+ - reg
+ - memory-region
+ - power-domains
+ - power-domain-names
+
+allOf:
+ - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/mailbox/qcom-ipcc.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+ #define IPCC_MPROC_SOCCP
+
+ remoteproc@d00000 {
+ compatible = "qcom,kaanapali-soccp-pas";
+ reg = <0x00d00000 0x200000>;
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ interrupts-extended = <&intc GIC_SPI 167 IRQ_TYPE_EDGE_RISING>,
+ <&soccp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&soccp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&soccp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&soccp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&soccp_smp2p_in 9 IRQ_TYPE_EDGE_RISING>,
+ <&soccp_smp2p_in 10 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack",
+ "pong",
+ "wake-ack";
+
+ memory-region = <&soccp_mem>,
+ <&soccp_dtb_mem_mem>;
+
+ firmware-name = "qcom/kaanapali/soccp.mbn",
+ "qcom/kaanapali/soccp_dtb.mbn";
+
+ power-domains = <&rpmhpd RPMHPD_CX>,
+ <&rpmhpd RPMHPD_MX>;
+ power-domain-names = "cx",
+ "mx";
+
+ qcom,smem-states = <&soccp_smp2p_out 0>,
+ <&soccp_smp2p_out 10>,
+ <&soccp_smp2p_out 9>,
+ <&soccp_smp2p_out 8>;
+ qcom,smem-state-names = "stop",
+ "wakeup",
+ "sleep",
+ "ping";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_MPROC_SOCCP
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_MPROC_SOCCP
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "soccp";
+ qcom,remote-pid = <19>;
+
+ /* ... */
+ };
+ };
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml
index 63a82e7a8bf8..149e993282bb 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml
@@ -33,16 +33,22 @@ properties:
- description: Handover interrupt
- description: Stop acknowledge interrupt
- description: Shutdown acknowledge interrupt
+ - description: Pong interrupt
+ - description: Wake acknowledge interrupt
interrupt-names:
minItems: 5
+ maxItems: 7
items:
- - const: wdog
- - const: fatal
- - const: ready
- - const: handover
- - const: stop-ack
- - const: shutdown-ack
+ enum:
+ - wdog
+ - fatal
+ - ready
+ - handover
+ - stop-ack
+ - shutdown-ack
+ - pong
+ - wake-ack
power-domains:
minItems: 1
@@ -55,13 +61,21 @@ properties:
qcom,smem-states:
$ref: /schemas/types.yaml#/definitions/phandle-array
description: States used by the AP to signal the Hexagon core
+ minItems: 1
items:
- - description: Stop the modem
+ - description: Stop the remoteproc
+ - description: Wake up the remoteproc
+ - description: Make the remoteproc sleep
+ - description: Ping the remoteproc
qcom,smem-state-names:
description: The names of the state bits used for SMP2P output
+ minItems: 1
items:
- const: stop
+ - const: wakeup
+ - const: sleep
+ - const: ping
smd-edge:
$ref: /schemas/remoteproc/qcom,smd-edge.yaml#
--
2.25.1