[PATCH v2 2/2] arm64: dts: socfpga: stratix10: fix CHECK_DTBS DTC_FLAGS warning
From: Khairul Anuar Romli
Date: Fri Dec 19 2025 - 18:49:09 EST
Add start address and ranges to eccmgr. This change corrects the warning:
socfpga_agilex.dtsi:612.10-669.5: Warning (simple_bus_reg): /soc@0/eccmgr:
missing or empty reg/ranges property
Refs:
Intel Stratix 10 Hard Processor System Address Map and Register
Definitions
https://www.intel.com/content/www/us/en/programmable/hps/stratix-10/hps.html
Signed-off-by: Khairul Anuar Romli <karom.9560@xxxxxxxxx>
---
Changes in v2:
- fix v1 eccmgreccmgr@ff8c0000 typo to eccmgr: eccmgr@ff8c0000.
---
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index 657e986e5dba..491cf35cfe8b 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -581,7 +581,7 @@ sdr: sdr@f8011100 {
reg = <0xf8011100 0xc0>;
};
- eccmgr {
+ eccmgr: eccmgr@ff8c0000 {
compatible = "altr,socfpga-s10-ecc-manager",
"altr,socfpga-a10-ecc-manager";
altr,sysmgr-syscon = <&sysmgr>;
@@ -590,7 +590,7 @@ eccmgr {
interrupts = <0 15 4>;
interrupt-controller;
#interrupt-cells = <2>;
- ranges;
+ ranges = <0 0xff8c0000 0xc400>;
sdramedac {
compatible = "altr,sdram-edac-s10";
--
2.43.0