Re: [PATCH v2 0/2] lib/crypto: x86/sha: Add PHE Extensions support

[Eric Biggers]

On Fri, Dec 19, 2025 at 04:03:04PM +0800, AlanSong-oc wrote:
> For Zhaoxin processors, the XSHA1 instruction requires the total memory
> allocated at %rdi register must be 32 bytes, while the XSHA1 and
> XSHA256 instruction doesn't perform any operation when %ecx is zero.
> 
> Due to these requirements, the current padlock-sha driver does not work
> correctly with Zhaoxin processors. It cannot pass the self-tests and
> therefore does not activate the driver on Zhaoxin processors. This issue
> has been reported in Debian [1]. The self-tests fail with the
> following messages [2]:
> 
> alg: shash: sha1-padlock-nano test failed (wrong result) on test vector 0, cfg="init+update+final aligned buffer"
> alg: self-tests for sha1 using sha1-padlock-nano failed (rc=-22)
> ------------[ cut here ]------------
> 
> alg: shash: sha256-padlock-nano test failed (wrong result) on test vector 0, cfg="init+update+final aligned buffer"
> alg: self-tests for sha256 using sha256-padlock-nano failed (rc=-22)
> ------------[ cut here ]------------

This cover letter is misleading, as those self-test failures will still
exist regardless of this patch series.

> To enable XSHA1 and XSHA256 instruction support on Zhaoxin processors,
> this series adds PHE Extensions support to lib/crypto for SHA-1 and
> SHA-256, following the suggestion in [3].
> 
> v1 link is below:
> https://lore.kernel.org/linux-crypto/20250611101750.6839-1-AlanSong-oc@xxxxxxxxxxx/

Please run the sha1 and sha256 KUnit test suites
(CRYPTO_LIB_SHA1_KUNIT_TEST and CRYPTO_LIB_SHA256_KUNIT_TEST) before and
after this series, with the benchmark enabled (CRYPTO_LIB_BENCHMARK),
and show the results.  For this series to be considered, the tests need
to pass and there needs to be a significant performance improvement.

- Eric